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| mithro | futarisIRCcloud: Oh cool! | 00:03 |
|---|---|---|
| mithro | kgugala: See the above! | 00:03 |
| mithro | @futarisIRCcloud Awesome thanks! | 00:06 |
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| forksand | _florent_: I see the MAC set there, but the value there isn't what gets set on boot (linux-on-litex-vexriscv). Each time the FPGA is flashed, even with the same .svf, it will generate a new random MAC on boot. | 00:18 |
| forksand | the "traditional" user space tools for this don't work either, fwiw. (`ip`, `macchanger` network/interfaces, etc) | 00:19 |
| mithro | forksand: This is with LiteEth? | 00:19 |
| mithro | forksand: I believe kgugala's team was working on Linux drivers for LiteEth so might have some insight into making that work -- it's probably just something missing from the driver? | 00:20 |
| forksand | mithro: ya, with LiteEth. | 00:22 |
| mithro | forksand: Likely the current driver doesn't do anything to set the mac address... | 00:24 |
| forksand | mithro: _florent_ I see that it gets set in LiteX when TFTP booting to the static value you pointed to in bios/boot.c. But when the linux kernel boots up and the liteeth kernel module loads, it sets it to a random MAC, not the one in the bios. | 01:19 |
| mithro | forksand: Sorry, you have reached the limit of my surface level knowledge, I could probably dig into it but I'm afraid I don't have the time right now.... | 01:19 |
| mithro | kgugala: https://github.com/litex-hub/linux-on-litex-vexriscv/issues/53 | 01:24 |
| tpb | Title: Persistent Files. (Nexys4DDR) · Issue #53 · litex-hub/linux-on-litex-vexriscv · GitHub (at github.com) | 01:24 |
| john_k[m] | futarisIRCcloud: interesting re Panologic G2 DDR2, although that's still using MIG | 03:06 |
| john_k[m] | "By lowering the clock from 300MHz to 125MHz, I was hoping to not need calibrated IOs (and thus no ZIO pin), and that's exactly how it worked out." coudl be helpful hint though | 03:07 |
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| bonzibuddy | hey litex gurus - anyone around that has experience with the versa ecp5? im super n00b and cant seem to get the thing to begin loading the prebuilt binaries... it just mucks around with the demo that came out of the box | 03:35 |
| bonzibuddy | gonna RTFM but if anyone has quick pointers, i'd love to hear em!! | 03:36 |
| bonzibuddy | i've gotten as far as setting the jumpers as suggested - i get some pretty esoteric jtag errors on the make.py --load, and an unresponsive process when i try lxterm loading over serial | 03:40 |
| bonzibuddy | i suppose i should be more specific, this is all w.r.t. https://github.com/litex-hub/linux-on-litex-vexriscv | 03:46 |
| tpb | Title: GitHub - litex-hub/linux-on-litex-vexriscv: Linux on LiteX-VexRiscv (at github.com) | 03:46 |
| bonzibuddy | trying some prjtrellis examples for now, hopefully that gets me on the right path | 04:12 |
| mithro | Oh cool -- https://github.com/skiphansen/pano_progfpga | 04:46 |
| tpb | Title: GitHub - skiphansen/pano_progfpga: Flashing Pano Logic G1 devices without a programmer (at github.com) | 04:46 |
| mithro | kgugala: https://github.com/skiphansen/pano_progfpga | 04:48 |
| tpb | Title: GitHub - skiphansen/pano_progfpga: Flashing Pano Logic G1 devices without a programmer (at github.com) | 04:48 |
| daveshah | bonzibuddy: follow these jumper instructions https://github.com/SymbiFlow/prjtrellis/tree/master/examples/versa5g | 06:13 |
| tpb | Title: prjtrellis/examples/versa5g at master · SymbiFlow/prjtrellis · GitHub (at github.com) | 06:13 |
| daveshah | If you haven't already | 06:13 |
| bonzibuddy | daveshah you spooky bastard i just got that exact example working not 2 minutes ago | 06:14 |
| bonzibuddy | so the issue - i have a versa ECP5 board and not an ECP5G :) had to tweak the makefiles and some openocd conf files were also off | 06:14 |
| bonzibuddy | of curious note, my board has "ECP-5G" silkscreened on it, but the "-5G" is sharpied out. weird. anyways, thanks for digging that up for me! | 06:15 |
| daveshah | There have been a few variants of the board | 06:16 |
| bonzibuddy | so to get the prjtrellis working, i had to specify a different arg to nextpnr-ecp5 | 06:25 |
| bonzibuddy | from --um5G-45k to --um-45k. I'm having trouble figuring out where that equivalent is in linux-on-litex-vexriscv | 06:26 |
| daveshah | For linux-on-litex-vexriscv you actually want --um45k and --speed 8 on the nextpnr command line | 06:26 |
| daveshah | Otherwise the timing results will be very pessimistic, less important for a blinky but more annoying for Linux | 06:27 |
| daveshah | I can't remember how to do that on the LiteX side either though | 06:27 |
| bonzibuddy | heh, ok. thanks. i imagine its in the litex-boards defs?? | 06:27 |
| bonzibuddy | poking around now | 06:27 |
| bonzibuddy | platforms/versa_ecp5.py:202 might e it | 06:29 |
| bonzibuddy | wow, that did it | 06:35 |
| bonzibuddy | successful upload anyway | 06:36 |
| bonzibuddy | :D loading the image | 06:38 |
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| somlo | forksand: re. liteeth linux driver, I think I've bumped into the same thing on 64bit Rocket (I "ported" the 32bit vexriscv linux driver to 64bit, and it's working well, except for the mac address thing you also encountered) | 13:34 |
| somlo | attempts to read the mac address from hardware fail with a "load access fault", so I commented it out and went with the random on-the-fly alternative: | 13:35 |
| somlo | https://github.com/gsomlo/linux/blob/gls-litex-rocket/drivers/net/ethernet/litex/litex_liteeth.c#L368 | 13:35 |
| tpb | Title: linux/litex_liteeth.c at gls-litex-rocket · gsomlo/linux · GitHub (at github.com) | 13:35 |
| somlo | forgot all about it, was going to circle back and take a closer look later, unless it's one of those rare problems that just go away if I ignore it long enough :D | 13:36 |
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| forksand | somlo: cool thx | 15:15 |
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