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goran-mahovlic_ | Hi to all, I have managed to build LiteX for ULX3S with 64Mb SDRAM but it stops at --========== Booting Linux =============-- | 18:38 |
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goran-mahovlic_ | I do not know what could I try to do to get start linux | 18:38 |
goran-mahovlic_ | memtest seams to report OK | 18:41 |
goran-mahovlic_ | https://twitter.com/RadionaOrg/status/1165671903681495040 | 18:41 |
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goran-mahovlic_ | on older board we got to here: | 19:47 |
goran-mahovlic_ | [ 297.743313] Run /init as init process | 19:47 |
goran-mahovlic_ | mount: mounting tmpfs on /dev/shm failed: Invalid argument | 19:47 |
goran-mahovlic_ | mount: mounting tmpfs on /tmp failed: Invalid argument | 19:47 |
goran-mahovlic_ | mount: mounting tmpfs on /run failed: Invalid argument | 19:47 |
goran-mahovlic_ | Starting syslogd: OK | 19:47 |
goran-mahovlic_ | Starting klogd: | 19:47 |
_florent_ | Hi goran-mahovlic_ | 19:52 |
_florent_ | are you using the same linux images? | 19:53 |
_florent_ | (it should work) | 19:53 |
_florent_ | sorry have to go, i'll have more time to answer tomorrow | 19:56 |
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goran-mahovlic_ | ok no hurry | 20:08 |
goran-mahovlic_ | yes, same linux images on different boards (that actually have same hardware) | 20:09 |
goran-mahovlic_ | 85F and 64Mb SDRAM | 20:09 |
goran-mahovlic_ | daveshah what module for RMII should I use | 20:14 |
goran-mahovlic_ | on VERSA I see 4 TX and RX lines on PMOD that I have areo nly 2 | 20:16 |
goran-mahovlic_ | On one board that did not work I have changed 64Mb to 32Mb and now I am loading to check will it work | 20:19 |
goran-mahovlic_ | memtest is ok now it is loading image | 20:19 |
goran-mahovlic_ | ok for eth probably I need to use this module LiteEthPHYRMII | 20:26 |
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goran-mahovlic_ | EMARD booted one after some time | 20:38 |
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goran-mahovlic_ | hmm on PMOD i do not know where this is Subsignal("ref_clk", Pins("D5")), | 21:16 |
goran-mahovlic_ | for RMII | 21:16 |
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goran-mahovlic_ | did not get it work :) I am probably missing something -- if I run netboot I get command not found | 22:15 |
goran-mahovlic_ | I probably did not enable something | 22:15 |
daveshah | goran-mahovlic_: have you changed serial here https://github.com/litex-hub/linux-on-litex-vexriscv/blob/master/make.py#L145 to serial+ethernet? | 22:21 |
tpb | Title: linux-on-litex-vexriscv/make.py at master · litex-hub/linux-on-litex-vexriscv · GitHub (at github.com) | 22:21 |
goran-mahovlic_ | nop :) will do now | 22:27 |
daveshah | You also need to add Ethernet to the target | 22:27 |
daveshah | Similar to the Versa EthernetSoC | 22:27 |
goran-mahovlic_ | I did that -- copy pasted from other targer | 22:27 |
daveshah | Right, you'll need to change BaseSoC to EthernetSoC on that line too then | 22:28 |
goran-mahovlic_ | I have used this as a reference but needed to remove this line | 22:31 |
goran-mahovlic_ | https://github.com/enjoy-digital/litex/blob/master/litex/boards/targets/nexys4ddr.py#L45 | 22:31 |
tpb | Title: litex/nexys4ddr.py at master · enjoy-digital/litex · GitHub (at github.com) | 22:31 |
goran-mahovlic_ | is it normal that it takes minutes to pass -========== Booting Linux =============-- | 22:33 |
goran-mahovlic_ | I still did not see that it is passing that line, but emard told me that he waited for a while and then it continued to load | 22:34 |
daveshah | No, don't think it's more than a second before the first kernel message (on hardware anyway, sim might be slower) | 22:34 |
goran-mahovlic_ | hmm he booted I think 30 mins | 22:34 |
daveshah | Unless something has broken in the recent build, or is acting up on the ULX3S for some reason | 22:34 |
goran-mahovlic_ | yup, that could be the reason | 22:34 |
goran-mahovlic_ | tnx David will test rest tomorrow and will rebuild with ethernet to check | 22:35 |
goran-mahovlic_ | one more question I have added SD card to target should I enable it some ware in make | 22:36 |
goran-mahovlic_ | adding ethernet to make did not help -- will try tomorrow still complains | 22:44 |
goran-mahovlic_ | --========= Peripherals init ===========-- | 22:44 |
goran-mahovlic_ | Initializing SDRAM... | 22:44 |
goran-mahovlic_ | SDRAM now under hardware control | 22:44 |
goran-mahovlic_ | Memtest OK | 22:44 |
goran-mahovlic_ | --========== Boot sequence =============-- | 22:44 |
goran-mahovlic_ | Booting from serial... | 22:44 |
goran-mahovlic_ | Press Q or ESC to abort boot completely. | 22:44 |
goran-mahovlic_ | sL5DdSMmkekro | 22:44 |
goran-mahovlic_ | Timeout | 22:44 |
goran-mahovlic_ | No boot medium found | 22:44 |
goran-mahovlic_ | --============= Console ================-- | 22:44 |
goran-mahovlic_ | litex> netboot | 22:44 |
goran-mahovlic_ | Command not found | 22:44 |
goran-mahovlic_ | litex> | 22:44 |
daveshah | Are you sure you've added the Wishbone slave, CSR, memory region and interrupts for the MAC? | 22:50 |
daveshah | https://github.com/enjoy-digital/litex/blob/master/litex/boards/targets/versa_ecp5.py#L118 | 22:50 |
tpb | Title: litex/versa_ecp5.py at master · enjoy-digital/litex · GitHub (at github.com) | 22:50 |
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