Thursday, 2019-08-22

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somlo\o/ successfully built litex+rocket on a riscv64 fedora VM (natively)10:42
somlowell, timing didn't pass 60MHz, but then I had to re-run it several times on intel to get that to pass, so I'm still declaring victory :)10:43
daveshahFYI, 55MHz is also fine for the TFTP10:49
daveshahand should be much more likely to pass10:49
somlodaveshah: http://www.contrib.andrew.cmu.edu/~somlo/BTCPP/screenlog.010:55
daveshah404?10:56
somlomake that http://www.contrib.andrew.cmu.edu/~somlo/BTCP/screenlog.010:56
somloand it does pass 55 MHz -- I'll try shoving the bitstream at the versa when I make it into the office later this morning :)10:57
somlolooks absolutely no different than on intel10:58
somloI "cheated" by creating riscv64-unknown-elf-foo scripts calling "/usr/bin/foo $*" to get around the built-in assumption of litex that it's cross-compiling on Intel :)10:59
somloI'll have to dig around the build script and fix that properly11:00
daveshahOtherwise looks very good11:02
daveshahI guess the emulator is only a couple of times faster than hardware?11:02
daveshahSo PnR times might be within feasible territory11:02
daveshahidk what the riscv compiler ecosystem is like, I would have thought you might need a cross compiler for baremetal (even same arch)?11:03
somloapparently not, command line flags was all that was needed...11:06
daveshahInteresting11:06
daveshahIncidentally, to get the bitstream after a timing failure you will need to run the ecppack part manually11:07
somlonow I'm actively waiting for a batch of trellis boards to try and run Fedora on them :)11:07
daveshahI can always try stuff you send me11:07
daveshahI guess the first step would be to get a network rootfs working11:08
somlore. ecppack: good to know, beats waiting another 10 hours for a new build -- although I could use a screenlog.0 file that doesn't ostensibly end with a "failure" :)11:08
daveshahYou can always modify litex to pass - -timing-ignore-fail to nextpnr11:10
daveshah* --timing-ignore-fail11:10
daveshahThe failures here are much smaller than the safety margin (particularly considering the FPGA isn't near max temp) so won't affect function11:10
somlobut then it will still try to run the clock at the requested frequency (rather than what it actually passed)11:11
somlooh11:11
somloI'll try to build it at requested 55MHZ (on intel) to see if it works otherwise, then just ask for that on the demo native build11:12
somlore. network rootfs: that appears to be the next thing on the todo list... and I'll definitely buy you about trying stuff on the trellis board -- thanks!11:18
somlo*bug you about trellis board11:18

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