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keesj | Hi | 06:52 |
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mithro | https://youtu.be/OAIf2lhUmGE | 08:05 |
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_florent__ | mithro: nice, thanks | 08:19 |
mithro | _florent__: Renode <- xobs' wishbone over USB -> LiteX on Fomu | 08:20 |
_florent__ | _florent__: that's what i kind of understood, what is doing Renode here? Controlling the periperals, or also emulating a RISC-V core? | 08:21 |
mithro | _florent__: Emulating a RISC-V core and controlling the GPIO peripheral on the Fomu | 08:49 |
mithro | _florent__: It could in theory be running RISC-V firmware or BIOS and it would map writes to that section onto the actual FPGA | 08:50 |
_florent__ | ok thanks | 09:04 |
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somlo | FYI: https://github.com/riscv/riscv-pk/pull/163 | 15:19 |
tpb | Title: Building BBL for the LiteX/Rocket SoC by gsomlo · Pull Request #163 · riscv/riscv-pk · GitHub (at github.com) | 15:19 |
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