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| acathla | tcal, tnt, thank you, it works and it was easy =) | 10:16 |
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| tcal | acathla: Great! I need to finish my blog post about it. | 15:58 |
| acathla | tcal, it would be great | 16:01 |
| acathla | I discovered I can add an instruction cache for something like 13 LC and a few RAM only and it sometimes speeds up things a lot. | 16:03 |
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| im-tomu | [tcal-x] Only 13 LC ah that's great, I think I have 13 to spare :) | 19:04 |
| acathla | I'm trying to reduce LC usage for UARTs, in litex it's 317 LC for a simple UART, 511LC if it's a master on wishbone | 19:17 |
| acathla | There is an instruction cache in foboot's vexriscv :) | 19:33 |
| acathla | xobs, what's the command line you used to produce the VexRiscv_Fomu.v file ? | 19:34 |
| tcal | acathla, xobs: I'm curious too | 19:37 |
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