Wednesday, 2019-04-03

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futarisIRCcloudmithro: I only just read about the SparkFun Edge... Looks like Pete Warden was involved.00:01
futarisIRCcloudhttps://codelabs.developers.google.com/codelabs/sparkfun-tensorflow does look like something that could run on fomu.00:06
tpbTitle: Machine learning on a microcontroller with SparkFun TensorFlow (at codelabs.developers.google.com)00:06
futarisIRCcloudhttps://github.com/tensorflow/tensorflow/tree/master/tensorflow/lite/experimental/micro/examples/micro_speech00:06
tpbTitle: tensorflow/tensorflow/lite/experimental/micro/examples/micro_speech at master · tensorflow/tensorflow · GitHub (at github.com)00:06
mithrofutarisIRCcloud: https://github.com/SymbioticEDA/MARLANN00:06
tpbTitle: GitHub - SymbioticEDA/MARLANN: Multiply-Accumulate and Rectified-Linear Accelerator for Neural Networks (at github.com)00:06
futarisIRCcloudhttps://www.globenewswire.com/news-release/2019/04/01/1790728/0/en/SparkFun-Electronics-Releases-SparkFun-Edge-the-Ultra-Low-Power-Development-Board-for-Machine-Learning-using-TensorFlow-Lite.html ... 11 am Mountain time on Fri -> 3am Brisbane time on Sat ...00:37
mithrofutarisIRCcloud: That board was released at the TensorFlow summit a while back?00:38
xobsfutarisIRCcloud: yep! Solved the problem. Now the only outstanding issue is dfu needs fixing. But that's a C issue.00:39
xobsmithro: morning!00:39
futarisIRCcloudmithro: https://petewarden.com/2019/03/07/launching-tensorflow-lite-for-microcontrollers/ - only a month ago...00:42
tpbTitle: Launching TensorFlow Lite for Microcontrollers « Pete Wardens blog (at petewarden.com)00:42
mithroxobs: How goes Fomu thins and were in the world are you these days? :-P00:43
xobsmithro: I have an update queued.00:45
mithroxobs: Bunnie's patching videos looked cool :-P00:46
xobsI screwed up dvt1, yeah, but now my patches are validated so I placed a purchase order for DVT2.00:47
xobs...which might become pvt100:47
xobsNext week will be work on the case.00:47
mithroxobs: Did you see the email from the Solokey people?00:48
xobsI expect to have an MVP Fomu dfu bootloader done this week. Finally.00:48
mithroxobs: Great00:48
xobsAnd I'm in Hong Kong today and tomorrow. Busy busy.00:48
xobsmithro: I did see the email. I also need to respond to that.00:55
mithroYou should probably forward the crowdsupply announcements to the tomu-discuss mailing list?00:56
mithroxobs: Also see private messages...00:57
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futarisIRCcloudhttps://blog.hackster.io/gui-less-development-with-the-tomu-5f3b77314c7401:35
tpbTitle: GUI-less Development with the Tomu – Hackster Blog (at blog.hackster.io)01:35
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futarisIRCcloudhttps://www.anandtech.com/show/14149/intel-agilex-10nm-fpgas-with-pcie-50-ddr5-and-cxl05:24
tpbTitle: Intel Agilex: 10nm FPGAs with PCIe 5.0, DDR5, and CXL (at www.anandtech.com)05:24
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tntxobs: "ERROR: Can't open input file `/tmp/ice40/foboot/hw/2-stage-1024-cache.v' for reading: No such file or directory"11:01
tntwhen trying to build the latest foboot11:01
tntah, using --with-debug works. But then yosys segfaults :/11:04
xobstnt: oops? Maybe forgot to ship that file, sorry!11:38
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tntxobs: btw, I think it was in your ccc talk about the arm usb stack that you mentionned that not caring about the address field was fine.  I found at least one hub where this fails. Device works fine but no new device can be connected to the hub afterward.13:11
xobstnt: I could see that being the case for broadcasts, but the device never actually creates any packets with the address field.13:40
xobsAlso, most FS/LS devices connected to a USB HS hub will go through a TT.13:41
tntyeah of course, but my guess is the hub just broadcast the enumeration with addr 0 to all its ports or something ...13:41
tnttbh I didn't dig much deeper than "answering to all packets regardless of addr" seemed to cause issue in that particular case :p13:42
tntmight be worth putting an analyzer on there.13:43
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xobstnt: that should fix the missing-verilog-file. sorry about that!14:20
tntxobs: indeed it does. tx.14:26
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tntxobs: you don't happen to have 2-stage-no-cache.v :)14:32
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xobstnt: I do, why do you ask?14:33
tntJust wondering how small the vexriscv can be. I guess the cache doesn't come for free and if the app runs out of spram purely, that shouldn't matter right ? (I assume cache is mostly if XIP from flash ?)14:34
tnthuh 2-stage-no-cache-debug.v  == 2-stage-1024-cache-debug.v ?14:35
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xobstnt: https://github.com/xobs/VexRiscv-verilog/tree/riscv-contest-2019031514:36
tpbTitle: GitHub - xobs/VexRiscv-verilog at riscv-contest-20190315 (at github.com)14:36
xobsIs it no flash?  I thought it had cache.  I might have screwed up the naming.14:37
xobsThat's the Makefile that I'm using to create the various versions of the CPU.14:37
tntthe verilog files for the 1024-cache and no-cache version are the same.14:38
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poranekHello16:26
poranekIs possible increase memory?16:26
poranekmruby need 400kB memory for running.16:27
poranekmruby have many constans variable and big flexible compiler16:27
poranekon fomu16:30
tntno16:41
tntThe FPGA has 1 MBits SRAM (i.e. 128 kbytes), nothing you can do about that.16:41
poranek;( Ruby are more flexible language ;)16:41
tntif this is 'static data', you can possibly use flash.16:42
poranekflash are separately?16:42
tntand XIP (eXecute In Place)16:42
tntyes, the flash is a separate chip, but for the purpose of a CPU it's pretty much read-only memory.16:42
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poranek@tnt thanks17:04
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poranekis possible using tomu as koprocessor?18:34
poranekfor example i put it to raspberry pi and can learn network artifical18:34
tntthe tomu or fomu ?18:38
poranekYou tell me18:41
poranekfor example my C program can put data and run program on fomu/tomu?18:46
poranekcan You show/tell me any example?18:46
tntnope sorry. never used either of them.18:47
poranekYou dont use C?18:49
poranekI'm not undestand18:52
poranekok18:59
poranekthanks for You reply18:59
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