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| xiretza[cis] | I need to do some clock gating crimes on iCE40, does anyone have resources on switching characteristics of LUT4s? | 12:02 |
|---|---|---|
| xiretza[cis] | I need to gate a nonperiodic clock input (really a counter event input) with an async gate signal, which is doable enough with discrete gates that have well-defined output transition characteristics, but I don't know how LUT4s behave. | 12:05 |
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| whitequark[cis] | they're reasonably well behaved IME | 16:30 |
| whitequark[cis] | i think you probably want to use the MSB input with yosys since that one controls the last mux | 16:30 |
| whitequark[cis] | but check the specify block | 16:30 |
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