Wednesday, 2024-06-12

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whitequark[cis]the quicklogic installation flow is pretty weird12:02
whitequark[cis]I reported a bunch of issues against it to try and make it function passably but it never quite did12:02
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Guest97does nextpnt-ecp5 --gui actually work? or how can you get it to work? I see entries in the Cells and Nets tabs, but when I select them, I see nothing in the Device tab12:16
Guest97I'm assuming nextpnr is on topic even if it's not strictly part of yosys12:17
Guest97maybe there's a better way to view what yosys actually generated?12:20
whitequark[cis]what do you want to see?12:40
whitequark[cis]just a netlist?12:41
Guest97whitequark[cis] the netlist with write_verilog is not very readable so I wanted something nicer12:52
whitequark[cis]does show work for you?12:55
whitequark[cis]usually it does not, but it's not like nextpnr is better12:55
whitequark[cis]it is not readable, i mean12:55
Guest97"show"? I don't know that12:56
whitequark[cis]yosys command12:57
whitequark[cis]use it in place of write_verilog12:57
Guest97will try12:57
Guest97it generated a 33 MB .dot file, and dot is chewing on it hard...13:22
Guest97will this even terminate? I aborted it14:02
Guest97any other options?14:02
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lethalbitThere is a 3rd party tool netlistsvg which takes the output of `write_json` and converts it into a "schematic"14:15
lethalbitbut for large designs it's going to be painful 14:15
lethalbitif the `show` command didn't work for you, I doubt netlistsvg will do any better14:16
Guest97most of the design is just a vexriscv soc14:20
lethalbitin that case, assuming the design isn't fully flattend you might just want to use `select` to filter out that14:21
Guest97interesting idea14:21
lethalbitI mean, I suspect that will trim your netlist down by a lot, making `show` more reasonable14:22
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