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| ikskuh | heya o/ | 12:17 |
|---|---|---|
| ikskuh | how good is the support for the lattice CrossLink-NX devices right now? | 12:18 |
| lofty | ikskuh: google tried using it for a thing, but then cancelled the project it was for (because google); otherwise, it's not been used much in the real world | 12:20 |
| ikskuh | hmm | 12:23 |
| ikskuh | i want to do some CVBS capturing and forward the picture as "raw" as possible to a rpi like device | 12:23 |
| ikskuh | current plan was using mipi and crosslink-nx has mipi support | 12:24 |
| lofty | Could you not achieve it with an ECP5? | 12:29 |
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| ikskuh | probably, yes | 12:30 |
| ikskuh | but i was kinda oogling with the QFN package :D | 12:30 |
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| ikskuh | but i'm still just exploring the idea space. i found a project that basically does everything perfectly already | 12:36 |
| ikskuh | https://openhardware.antmicro.com/boards/cvbs-mipi-bridge/ | 12:36 |
| tpb | Title: Composite Video (CVBS) to MIPI CSI-2 Bridge ยท Antmicro Hardware Portal (at openhardware.antmicro.com) | 12:36 |
| ikskuh | but i found another chip that supports up to 10 inputs which is really tempting | 12:36 |
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| ikskuh | is there a community where i can ask for help with a FPGA design? i guess this channel is mainly for yosys development, not hardware design :) | 14:24 |
| lofty | ##fpga maybe | 14:28 |
| ikskuh | let's see :) | 14:38 |
| jn | ikskuh: and also HDL-specific channels like #amaranth-lang | 14:44 |
| ikskuh | not hdl-specific right now :) | 14:44 |
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