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| Hammdist | on colorlight 5a-75b is there PHY initialization required? | 13:55 |
|---|---|---|
| Hammdist | i.e., through MDIO? | 13:56 |
| sensille | i don't think so, not totally sure. but it just worked with litex | 13:59 |
| sensille | you only have to be careful with the reset line as it stops the clock (or was it on 5a-75e?) | 14:00 |
| Hammdist | I know litex works on it but maybe the firmware is doing mdio commands? if so I would like to get a code pointer to that ... | 14:02 |
| Hammdist | https://github.com/enjoy-digital/liteeth/blob/4eec8419d0a833bb18461b3b2a2b4205128864b9/liteeth/phy/common.py#L34 it looks like liteeth allows to bitbang through CSR interface | 14:07 |
| Hammdist | litex/soc/software/libliteeth/mdio.c indeed there is code for interacting with mdio through csr | 14:12 |
| Hammdist | still not sure what, if anything, invokes it though | 14:13 |
| Hammdist | litex/soc/software/bios/cmds/cmd_liteeth.c the bios, for one thing | 14:14 |
| Hammdist | but that's not an initialization sequence that's just if you want to send mdio commands manually | 14:14 |
| Hammdist | so apparently litex bios just resets the phy without mdio, though there is option to turn this off: https://github.com/enjoy-digital/litex/blob/a4ead5cab9d341d1b642c016b5f8526b645b3b40/litex/soc/software/libliteeth/udp.c#L464 | 14:27 |
| Hammdist | I haven't actually found the code of crg_reset but I think that's how it is | 14:27 |
| Hammdist | this would mean it's probably OK to not initialize the PHY through MDIO | 14:27 |
| Hoernchen | there is in theory nothing you need to do unless you want to turn off autonegotiation for <1gbit or shift the interface delay | 15:21 |
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| Hammdist | thanks for confirming | 16:13 |
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