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| cr1901 | _florent_: (or just black) Black is usually all 0s in a framebuffer, right? Is it possible for DRAM cells to degrade to 1 when they were initially 0? The capacitor leaks charge to GND, right? Where does the charge come from to make the bitline > Vdd/2 for the sense amplifiers? | 03:38 |
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| somlo | so I picked "optimal" (according to iperf bandwidth measurements) tx_delay and rx_delay values for my board's rgmii. I notice that after a few hours (during which there's no actual network traffic to/from the board) I can no longer ping in or out of the board | 11:53 |
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| somlo | other, "less optimal" values of tx_delay in the past didn't have this problem | 11:53 |
| somlo | if anyone here is intimately familiar with how rgmii ethernet phy works - am I likely on the "too long" or "too short" side of my tx_delay value ? :) | 11:54 |
| somlo | currently the plan is to "throw darts" in the general vicinity of my "best-for-iperf" value until I see it stop losing connectivity overnight, and go with that | 11:55 |
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| MoeIcenowy | ah about the DRAM refreshing issue | 14:43 |
| MoeIcenowy | I remembered installing a 8GB DDR3 SODIMM on my STLV7325 | 14:44 |
| MoeIcenowy | and find LiteDRAM failing | 14:44 |
| MoeIcenowy | (and finally I realized a bigger chip needs a longer time to refresh | 14:44 |
| MoeIcenowy | and after tweaking the timing it works | 14:44 |
| MoeIcenowy | maybe we should make the refresh time correspond to the longest possible on DIMMs? | 14:44 |
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