Wednesday, 2022-11-09

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MoeIcenowyoh, NaxRiscV is now GC?01:29
MoeIcenowy_florent_: as Zicbom is now part of RV spec, maybe now we should implement a DMA-interface-less practice in SW?01:30
MoeIcenowynothing is supporting Zicbom now, but C906 has a private replacement of it01:35
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cr1901The hell is the Zicbom extension?02:04
* cr1901 feels like the RV spec has kinda lost the plot02:04
MoeIcenowycr1901: instructions to flush cache02:09
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cr1901Ahhh right, the base spec has no insns to flush cache02:19
cr1901(which is fine w/ me)02:19
cr1901MoeIcenowy: Do you know a list of _all_ the Z extensions? Last I checked the base spec only mentions A to Y02:27
MoeIcenowycr1901: no and never no03:07
MoeIcenowyZxxxx is for extended standard extensions03:07
MoeIcenowyfor example, the old I extension is now new I + Zicsr + Zifencei03:08
cr1901Did C split into Zs yet?03:14
cr1901I remember an extended compressed extension03:14
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MoeIcenowycr1901: it's not split, Zc is enhancement to C07:02
Melkhiorsomlo: for VexRiscv, the DMA is in the cluster I think - it would be there: <https://github.com/SpinalHDL/VexRiscv/blob/026d1b1a16df63da35255a5ef744fcaafd829514/src/main/scala/vexriscv/demo/smp/VexRiscvSmpLitexCluster.scala#L73-L85> ?07:31
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tntDoes anyone know how to generate a MPSoC boot image from a litex design ?15:16
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bentomoI'm not a litex expert, but I know that MPSoC has very special boot, because the ARM reads the spi flash. So Vitis/Xilinx software tools are actually required to generate them. IDK if litex supports them so try to grep around for any command line calls to "bootgen", "xsdk", "vitis", "xsct" etc... If you don't know how the xilinx tools do it first17:18
bentomoI'd recommend reading that flow first.17:18
bentomoVivado can supposedly produce a bin file that's readable by MPSoC, but I've had lots of issues programming the bin without using the Vitis/XSDK tools. Vivado can "supposedly" do it.17:20
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jersey99Does anyone know what migen means, when it says "could not lower all specials", in the context of using an Instance of a vhdl module?18:23
jersey99the external module being included is a special. And it is trying to 'lower' it, by checking if it can do some substitutions. But somehow fails to18:24
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jersey99_florent_Is there an example that you could point me to where you simulate an external (non-litex) module?20:35
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