Tuesday, 2022-09-20

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somlotpw_rules: I think leons was responding to my (much) earlier rant about it being hard to bisect issues that span litex, litedram, and a whole bunch of other repositories that evolve in parallel00:12
somloleons: thanks, I can try to enable BIST and see what new information (if any) that gets us00:12
mikek_VA3TECsomlo: would you have a gists on that? I would love to learn about it..00:13
leonstpw_rules: hi :)00:14
leonssomlo: Sorry, my replies might've been out of context. I was trying to answer mikek_VA3TEC 's question: "is LiteDRAM separate from litex-boards?"00:15
somlomikek_VA3TEC: gists on what? bisecting across multiple repos with occasional sync points? I don't know how to do that, that's why I'm complaining about it :)00:16
somlooh, understood -- although it makes sense in my own context as well :)00:17
mikek_VA3TEC:)  no more about how you enable the BIST and use it in context..  (Sorry I am still very new to this)00:17
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mikek_VA3TECso, I am using external hardware SDDRAM and only getting around 50MT/s and was wondering if this is normal..00:18
leonssomlo: haha that's great :) regarding DRAM speeds in general, I would always try to test with BIST first. That allows you to get an estimate of the maximum achievable speed when the DRAM controller pipelines are always full, so it's a good strategy to determine an upper optimization bound00:18
somloI was going to try to figure out how to do that tomorrow (assuming it makes sense in my context) -- so I don't know (yet)00:18
leonsWithout knowing any specifics, I would guess that if the BIST values seem plausible (I guess within ~70-90% of theoretical bandwidth), the VexRiscv not being able to achieve that is a matter of its pipelining and caching and other magic + the WB transactions + any multi-cycle WB XBAR (if any) not being able to keep the pipelines of LiteDRAM full00:20
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tpw_rulesleons: somlo's complaint is one of the reasons i'm exceited about nix-litex00:24
mikek_VA3TEC nix-litex??00:24
tpw_rulesexcited*00:24
mikek_VA3TECrunt in Litex?00:25
mikek_VA3TEChahahaha joke!00:25
mikek_VA3TECoops rust in Litex...00:25
leonstpw_rules: this one? https://libera.irclog.whitequark.org/litex/2022-09-19#32993460;somlo00:25
tpbTitle: #litex on 2022-09-19 — irc logs at libera.irclog.whitequark.org (at libera.irclog.whitequark.org)00:25
tpw_rulesi guess00:26
leonsI feel like I should really get on building the bot which automatically updates pkgs, tests and either pushes / sends an email to the ML with the failed build log. Should be easy enough, major parts are in place.00:26
tpw_rulesyes00:26
leonsI guess with that we'd be halfway there00:26
tpw_ruleswhat is the other half? actual docs? :)00:27
leonstpw_rules: ouch :D but yes :)00:27
mikek_VA3TECI second that!!!00:27
mikek_VA3TECactual docs!!00:27
tpw_rulesalso a cachix repo maybe. anyway i intend to help with the docs once we refactor the main default.nix. but this is all kind of off topic for this channel00:27
mikek_VA3TECi hope florent not's listen and gets mad...00:28
leonsI don't think getting mad about (more or less) on-topic discussions is how IRC's supposed to work00:29
tpw_rulesi think that was more complaining about docs. but that wasn't even about the main litex not docs so florent shouldn't be mad00:29
leonsAh right. For context (for others), this is the repo we're talking about having no docs: https://git.sr.ht/~lschuermann/nix-litex00:30
tpbTitle: ~lschuermann/nix-litex - sourcehut git (at git.sr.ht)00:30
tpw_rulesand solving the bisection problems/having a single globally consistent view of the litex ecosystem00:31
tpw_rules(and temporally!)00:31
mikek_VA3TECOH ok..  never heard of the nix package manager..00:31
mikek_VA3TECwhat's wrong with git pull and ./setup --updates00:32
mikek_VA3TECWanted your views.. 00:33
tpw_ruleshow do you undo that, for instance?00:33
tpw_rulesor do the same thing on a different computer?00:34
mikek_VA3TECyou can't I keep multiple copies of Litex, usually goes by months..00:34
leonsmikek_VA3TEC:  And how to guarantee that you end up with the same results (i.e., that `./setup --updates` is reproducible)?00:34
mikek_VA3TECit's not..  I had a solution, I never said it was a GOOD solution..  :)00:35
mikek_VA3TECI got stung with this exact problem last week...00:36
mikek_VA3TECLitex is too bleeding edge, there a lot of changes...  sometimes fundamental... like renaming boards...00:37
somlohuh... so I'm not familiar with nix-litex (or nix in general), but is the idea to grab a bunch of repositories and create a super-repository containing their respective commits, correctly interleaved (in the actual chronological order in which they were applied to the original repos)?00:39
somloI can imagine a tool that could do that programatically, then I could bisect on the super-repo to my heart's content00:40
mikek_VA3TECIS this not what GIT was suppose to do????00:40
tpw_rulesthat's more of a side effect of how nix and nix-litex works, but yes. the holdup now is that leons currently once a month or so updates the list. it would need to be like, daily, to be useful00:41
somloI can bisect within a git repo, but if what i'm building depends on other repositories that I'd then have to guess where in *their* history I have to go for each intermediate commit picked by bisect in my "main" repo...00:41
leonssomlo: Well, first and foremost this is just a way to make LiteX packages available through the Nix package manager, so you can build packages (read: FPGA designs) which depend on the LiteX packages00:41
leonsAnd then the reproducibility, automated tests on the combined package set, etc. comes for free00:42
mikek_VA3TECCAn software be written for this? example the change log's?  00:43
mikek_VA3TECflorent? should maintain a robust change log?00:43
somloleons: in my case, I *suspect* some generic axi improvements in litex might have something to do with memtest failing in certain cases; but if I pick a "git bisect good" candidate far back enough to be before those changes, I'm *guaranteed* I can't build (and therefore test) my design without guessing how far back to also go in litedram, litesdcard, litex-boards, and so on -- which makes bisect a practical non-starter00:44
leonssomlo: ah, yes, this is a very convincing argument. That would've been possible, had I built a bot to update nix-litex regularly :/00:45
tpw_rulesnix-litex works by having a list of repos and hashes, and eventually it will be regularly updated to a set which is temporally coherent and passes all the tests. then you would simply bisect nix-litex and all the rest would be done automatically. but this is a relatively new project so CI hasn't been set up yet00:46
somloso now I will look for a git-adjacent tool to "merge" multiple repositories by interleaving their commits in the right temporal order :)00:46
somloshould be worth something, so maybe someone already did it (like all my greatest ideas, others typically already had them before me :D)00:47
tpw_rulesyeah that would pretty much be the only way to do it now. but it will be better in the future :)00:47
mikek_VA3TECSee Git was suppose to do exactly this, different people had different changes to make, then biscet the changes. the problem now is that there are MULTIPLE git repo;s!00:47
mikek_VA3TECif I said it right..00:47
leonssomlo: The problem is that there's commits which are applied to multiple LiteX repos, but it's not necessarily in a fixed order (i.e. corresponding changes are merged into LiteX before it's merged into LiteDRAM or the other way around)00:48
leonsSo the benefit of nix-litex would be that the bot would only push collections of packages which are known to build along each other and pass all tests of all packages00:48
mikek_VA3TECCan special codes be entered into the git commit messages?00:48
mikek_VA3TECor travers?00:49
somlomikek_VA3TEC: we're going a bit off-topic talking about how git works, but *within* a repo: people can have clones, push and pull and generally trade commits, etc.; But if unrelated repositories need to be used in concert to build something, then bisecting in one of them is only feasible if it's safe to assume the other repositories are OK staying the same across the range of commits in the "repository under test" searched by bisect00:52
somlowhich is clearly *not* the case across the Lite* family of repositories. The simplest example is when something about litedram or litesdcard changes, and the bios code to initialize it in litex/litex/soc/software/* changes to match00:53
somloyou need to have the *right* version (commit) of litedram/litesdcard/etc. depending on where in the history of the main litex repo you happen to test00:54
somlos/right/matching/00:54
somloiow, bisect works *within* a repository, not across multiple repositories00:55
mikek_VA3TECI somewhat understand. This is not an easy problem to solve, You have the main tools and all the boards that are used against it. Right so now there has to be new software written that spans accross multiple repo's00:56
mikek_VA3TECLinus can write that!!  :)00:56
leonssomlo: I'd go as far as to say the problem is more far-reaching than that. Each repo has it's own CI, which tests a subset of the repos together, exercising a subset of functionality in the other repos' code. There is no way to be sure that a given commit in one repo, where CI passes, just caused the next CI run in another repo to fail01:05
leonsI don't know of a trivial way to fix this, except for an external CI which tracks known good compositions of packages, which is essentially what nix-litex is set out to become (as soon as I find some time...)01:06
mikek_VA3TECleons: this is why I was saying messages in the commits.  you can view the messages and see if things match u this way??01:06
mikek_VA3TECmatch up this way?01:07
leonsmikek_VA3TEC: I guess you could try and match up commits across multiple repos, but then again the whole point of CI is that it does not rely on maintainers doing the right thing(TM), and it being automatic01:08
mikek_VA3TECOH i totally agree....  more software has to be written, I was just giving a intern solution..01:09
mikek_VA3TECBut i guess that's what Linux was.... is..  work arounds work arounds until someone writes the proper software..01:10
mikek_VA3TECCould this be a Python Script?? 01:10
leonsThe update mechanism of nix-litex is already implemented as a Python script: https://git.sr.ht/~lschuermann/nix-litex/tree/main/item/maintenance/update_packages.py01:11
tpbTitle: ~lschuermann/nix-litex: maintenance/update_packages.py - sourcehut git (at git.sr.ht)01:11
mikek_VA3TECAh ok...   but yes... if the maintainers are not keeping up the good code practise... then all bets are off.  01:15
mikek_VA3TECHow was florent, OR the maintainers doing this before?01:15
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_florent_The situation regarding repo split/CI/doc is clear far from perfect, but it should be improving over time (I hope :)). It's mostly time/resource/dev/budget issues that also have their own constraints.  07:27
_florent_I'm personally more interested to build a nice community of developers finding the project useful and wanting to contribute than a big project/business, so things are growing/improving slowly, but I think with feedback from each other we'll go in the right direction :)07:30
_florent_For development, the repo split make things easier, but we should indeed continue removing some inter-dependencies (like having gateware/software for some cores in the same repo).07:31
_florent_litex_setup.py was initially used for development and has been improved a bit for deployment (with --tag support for example to install releases), but we should indeed improve pip or nix installation support07:33
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leons_florent_: I agree and the conversation wasn't supposed to be a rant about the current situation, just thinking about how someone downstream can ensure that a given collection of LiteX packages will work together.14:35
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somloas it turns out, I had a typo associating the wrong verilog to the "problematic" rocket cpu variant -- git bisect would have never caught it (I would have failed to find a "good" commit, no matter how far back I went) :)15:16
somlonot that the whole argument about bisect-ability isn't valid in the big scheme of things, just not applicable to this particular issue15:17
somloanyhow, got Fedora to boot on nexys_video: https://imgur.com/a/GozXcQ815:18
tpbTitle: Imgur: The magic of the Internet (at imgur.com)15:18
somlo(at least for a short time before it crashed, but progress!)15:18
mikek_VA3TECSweet!   :)15:19
leonssomlo: That is very cool! I have actually just gotten access to a Nexys Video board, mind sharing how to reproduce / pushing the code somewhere?15:20
mikek_VA3TECYes, i second that!15:21
somloso building the bitstream is easy (now that `fulld` rocket variant is no longer broken):15:23
somlolitex-boards/litex_boards/targets/digilent_nexys_video.py --build \15:23
somlo--cpu-type rocket --cpu-variant fulld --sys-clk-freq 50e6 \15:23
somlo--with-ethernet --with-sdcard \15:23
somlo--with-sata --sata-gen 1 --pll-refclk15:23
somlothen there's downloading the latest fedora-riscv64 image, and prepping a special initrd, dts/dtb, and opensbi firmware blob, and the writing all that to a sdcard15:25
somloI'll have to write all that down in a way that is intelligible (from various notes I took while hacking on it) -- that might take a day or two (need some peace and quiet from $DAYJOB to focus :D)15:27
somlousing `full4d` (4x SMP) crashes *before* getting a login prompt; using `full` (1x single-core) with the 4x DTB (I was lazy) crashes *after* the login prompt15:28
somloI still need to try the single-core with the correct DTB (that doesn't claim there are 4 cores available :) and see if maybe I get it to work *without* crashing15:29
somlogotta go, lunch break is almost over and I spent it on hacking instead of eating -- I'll be back later with more useful details15:31
mikek_VA3TECThanks Somlo!  :)15:31
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tntMmmm ... the error messages of migen are a bit obscure ... "assert (node.stop - node.start) >= 1"19:49
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tnt"""ERROR: [Synth 8-3391] Unable to infer a block/distributed RAM for 'storage_49_reg' because the memory pattern used is not supported. Failed to dissolve the memory into bits because the number of bits (528384) is too large. Use 'set_param synth.elaboration.rodinMoreOptions {rt::set_parameter dissolveMemorySizeLimit 528384}' to allow the memory to be dissolved into individual bits"""21:23
tntAnyone seen this before ?21:23
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