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| FabM | Hi, | 08:22 |
|---|---|---|
| FabM | Is there a project like CXXRTL but for Rust ? | 08:22 |
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| whitequark[cis] | not sure. cxxrtl can be used *from* rust; what's your use case? | 08:24 |
| FabM | Yes I think we can call C++ API from rust program. But I was wondering if there was a project that converted HDL Verilog directly to Rust. | 08:29 |
| FabM | Like CXXRTL but for Rust | 08:29 |
| whitequark[cis] | there is actually a C API which is a lot more convenient | 08:34 |
| whitequark[cis] | I think someone was working on a Rust backend but I don't recall who | 08:34 |
| jix | there is also the functional backend infrastructure which turns a netlist into a topologically sorted graph of operations, intended to write custom backends primarily to make it easier to interface yosys with various formal methods tools, but including a naive C++ backend, adapting that to output Rust would be another option | 08:47 |
| jix | so if you just need some way to evaluate a circuit, that might be enough, if you care about performance or having an actual API or any of the other things CXXRTL provides, it's not going to provide any of that | 08:48 |
| jix | https://github.com/YosysHQ/yosys/tree/main/backends/functional | 08:49 |
| jix | with that you might also run into some limitations since this hasn't been used that much outside of a few specific use cases, but most likely those would be limitations we'd want to get rid of or bugs we'd want to fix | 08:50 |
| jix | (and with that I mean limitations in what RTLIL it can handle, providing the same functionality that CXXRTL provides is out of scope) | 08:52 |
| jix | FabM: ^ | 08:52 |
| FabM | jix, Okay, thanks for the explanation. I think CXXRTL will suffice in my case. :) | 08:57 |
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| Guest19 | Hi | 09:47 |
| Guest19 | In my Yosys , *.ys script I want to put command by which I can get list of Black Bixes. Like in Design Compiler - get_cells -filter is_black_box == true | 09:47 |
| jix | Guest19: you can select all cells that are black box instances using the selection pattern `=* * %d %C` (without the quotes) and to list them you could use `select -list =* * %d %C` | 09:59 |
| jix | this doesn't include builtin primitives though, for those you'd use the selection `*/t:$*` | 09:59 |
| jix | `=* * %d %C` means take all modules including blackboxes `=*` then `* %d` means subtract from that all modules without blackboxes and select the result and `%C` means replace the selection with all cells that are instances of currently selected modules | 10:01 |
| jix | `*/t:$*` means select all cells that have a celltype starting with `$` | 10:02 |
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| Guest19 | In my *.ys scropt I have addeed - select -list =* * %d %C`. But got error - ERROR: Unknown selection operator '%C`'. | 10:05 |
| jix | what version of yosys are you using? | 10:05 |
| Guest19 | Yosys 0.9 (git sha1 1979e0b) | 10:06 |
| jix | that version is almost 6 years out of date | 10:07 |
| Guest19 | Ok | 10:09 |
| Guest19 | Which are the latest version? | 10:10 |
| Guest19 | Can you give me link ? | 10:10 |
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| Guest20 | I have tried with Yosys 0.55+146 (git sha1 262b00d5e, g++ 11.4.0-1ubuntu1~22.04 -fPIC -O3), but I am getting same error | 10:51 |
| Guest20 | In yosys I want to list out black boxes list. Looks like in Design compiler, we can do get_cell .... is_black_box = true | 10:54 |
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| Guest25 | Hi | 11:19 |
| Guest25 | I am using *.ys file for my synthesis . I want to list out all Blackbox modules. Like in Design compiler we are using get_cells -filter blackboxes=true | 11:21 |
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| lofty[m] | Guest25: all yosys blackbox modules have the (* blackbox *) attribute | 11:44 |
| Guest25 | Can you guide me Command. I want to put this command at the end of Yosys | 11:45 |
| lofty[m] | didn't jix already give you the command? | 11:46 |
| lofty[m] | select -list =* * %d %C | 11:47 |
| Guest25 | Tried with - select -list =* * %d %C, but it gives so many Black Boxes which were not correct | 11:47 |
| lofty[m] | okay, I feel I should ask: are you looking for black box cells or black box modules | 11:47 |
| Guest25 | Both | 11:47 |
| Guest25 | cells are alos fine | 11:48 |
| Guest25 | In Design Compiler I was using - get_cells -filter blackboxes=true | 11:48 |
| lofty[m] | I won't lie, I would probably use a different selection option, of select -list a:blackbox | 11:49 |
| Guest25 | Not working - select -list a:blackbox | 11:50 |
| lofty[m] | also, I guess I don't quite understand what your use case for this is | 11:51 |
| Guest25 | Actually I want to list out Black Boxes which are in my design | 11:51 |
| lofty[m] | I probably shouldn't ask why your design has blackboxes to begin with | 11:52 |
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| Guest56 | We are passing some Memory model and other models through *.lib files | 11:53 |
| Guest56 | Some module has only i/os , no logic | 11:53 |
| lofty[m] | I really hope you're not trying to impoprt black boxes through read_liberty | 11:53 |
| Guest56 | I am using command real_libert -lib | 11:54 |
| lofty[m] | is this the only way you're importing them? | 11:54 |
| Guest56 | Yes | 11:55 |
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| lofty[m] | then try select -list A:blackbox, which is modules with the attribute blackbox, rather than cells with the attribute blackbox | 11:56 |
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| jix | oh yeah using the attribute is a better idea, no idea why I didn't think of that, but you still need to use `=` since blackbox modules are excluded by default | 12:16 |
| jix | so `select -list =A:blackbox` gives you all blackbox modules and you can add `%C` to get all instances of blackbox modules (different from cells with the attribute blackbox, wich I'm not sure is a thing?) | 12:17 |
| lofty[m] | unfortunately they're gone at the moment | 12:20 |
| lofty[m] | but yeah, I think that's correct | 12:20 |
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