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| postroutine | Hello. I'm very new to Yosys and I would like to know: How it compare to HOG ? | 10:39 |
|---|---|---|
| csantosb | This Hog ? https://gitlab.com/hog-cern/Hog | 10:43 |
| tpb | Title: Hog / Hog · GitLab (at gitlab.com) | 10:43 |
| postroutine | Yes. | 10:53 |
| csantosb | I'd say they cover different goals. | 11:12 |
| postroutine | Yes, I was confused between Yosys and the OSS-CAD-SUITE | 11:39 |
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| Adrien[m] | Hi, I'm looking for some help in digging a nextpnr crash :... (full message at <https://catircservices.org/_irc/v1/media/download/AUnSoMTY9V2MinFMQbdAKOeh54dctN8lxmUwsqS5VAqwekLUyK309Noy4eBE5Nr2bQoF4XXbNt9c_JB9-Zv8N-6_8AAAAAAAAGNhdGlyY3NlcnZpY2VzLm9yZy9mZE5lVmhoZEJSQnp0Tm5KV1ZlTWFRWXA>) | 13:12 |
| Adrien[m] | This is nextpnr with Himbaechel backen for Xilinx. | 13:12 |
| Adrien[m] | With gdb I can get the details of the "bel" that triggers the issue : | 13:13 |
| Adrien[m] | `bel = {tile = 15791, index = 6}` | 13:13 |
| Adrien[m] | How can I find what type of primitive/cell this is about ? | 13:14 |
| Adrien[m] | I think I would like to call bel_name_in_site() defined in himbaechel/uarch/xilinx/xilinx.h, but I can't figure how to call it... | 13:30 |
| Adrien[m] | Maybe I'm supposed to call `ctx->getBelName(bel).str()` or `ctx->getBelName(bel)[0].c_str(ctx)` but these operators seem to have been optimized out during compilation... | 13:46 |
| Adrien[m] | phew finally got it : X83Y84/SLICE_X0Y0.B6LUT | 14:26 |
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| Ceres | Hello, Yosys people! Thank you for all your work on such wonderful software :) | 15:14 |
| Ceres | I'd like to contribute some code, but I have a couple of questions... | 15:14 |
| Ceres | (for context, I want to make "read_verilog -sv" support SystemVerilog unique/priority if, primarily by making the parser generate one big flattened AST_CASE/AST_COND.../AST_DEFAULT for "else if" branches, instead of the nested AST_CASEs it makes currently) | 15:15 |
| Ceres | What is the best approach for submitting changes? Should I open an enhancement issue and a pull request? Or just pull request? Or something else? | 15:16 |
| Ceres | So far, I have only the syntax change implemented (i.e., the parser validates and accepts but silently ignores unique/priority if), plus documentation and test cases. Is it better to submit this smaller change first, then work on the semantic implementation if this step is accepted? Or is it preferable to finish all the implementation, then | 15:17 |
| Ceres | submit an atomic PR for everything? | 15:17 |
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| lofty[m] | I would definitely break everything down into small PRs; I think most verilog frontend changes go through zachjs, so dropping a giant change on him may be too much at once. | 16:20 |
| Ceres | Thanks, lofty! I'll do that. | 16:33 |
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| latchflip | I'm hoping we get a CMake build of Yosys at some point. | 21:13 |
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