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| Adrien[m] | I have already used the board ZC706 at PCIe peripheral, using the PCIe framework Riffa which provides both HW interface and software driver | 11:33 |
|---|---|---|
| Adrien[m] | https://github.com/KastnerRG/riffa | 11:33 |
| Adrien[m] | The PS part of the Zynq chip was not used in my design, not needed and was kept off. But it should be straightforward to add to the design some other HW stuff that the PS part would interact with. | 11:35 |
| Adrien[m] | I could never understand how to setup PCIe with Vivado-provided IPs...... (full message at <https://catircservices.org/_matrix/media/v3/download/catircservices.org/YuKYVnyMbLPWItjfHpxZVfOj>) | 11:42 |
| Adrien[m] | Hope this helps. | 11:44 |
| Adrien[m] | We can discuss more privately if needed to reduce off-topic stuff on this channel. | 11:44 |
| juri_ | thank you! | 14:01 |
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