Thursday, 2024-03-07

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mkudinovHey guys. I've been synthesizing some examples from Harris & Harris book using Yosys and netlistsvg and I've got a very strange result. It should be AND with inverted input, but synthesis gave me NAND. Here's the code and synthesis commands: https://paste.debian.net/1309815/ And here's the synthesis result I've got (colored) and the solution from20:21
mkudinovthe book (black and white): https://imgur.com/a/3UxaJvd20:21
tpbTitle: debian Pastezone (at paste.debian.net)20:21
tpbTitle: Imgur: The magic of the Internet (at imgur.com)20:21
mkudinovIs this a bug or am I doing something wrong?20:22
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Wanda[cis]this looks like a netlistsvg bug20:36
mkudinovYeah I thought so too initially, but after synthesis Yosys gives this output:20:39
mkudinov```3.1.2. Re-integrating ABC results.20:39
mkudinovABC RESULTS:            ANDNOT cells:        120:39
mkudinovABC RESULTS:                OR cells:        220:39
mkudinovABC RESULTS:        internal signals:        120:39
mkudinovABC RESULTS:           input signals:        320:39
mkudinovABC RESULTS:          output signals:        220:39
mkudinov```20:39
mkudinovso NAND is actually present in the netlist20:39
loftyno, NAND is not present20:40
loftyANDNOT is20:40
mkudinovoh damn20:40
mkudinovmy bad then20:40
loftyA & ~B, which is different to ~(A & B)20:40
mkudinovyeah now I got it, English is not my first language so I didn't know that ANDNOT is not equal to NAND20:41
mkudinovThanks for help guys!20:43
mkudinovIndeed they thought that ANDNOT refers to NAND just as me. It was fixed in the latest commit20:56
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