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| xiretza[cis] | what am I doing wrong if hi-z outputs on iCE40 drive the pin low instead? I have nothing but an `assign q = 1'bz;` at this point. oss-cad-suite 2024-02-12 | 14:27 |
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| Wanda[cis] | ISTR this is a long-standing yosys bugs | 14:29 |
| Wanda[cis] | s/bugs/bug/ | 14:29 |
| Wanda[cis] | https://github.com/YosysHQ/yosys/issues/511 yup it is | 14:31 |
| xiretza[cis] | hah, thanks! | 14:33 |
| xiretza[cis] | indeed a manual SB_IO works, now I just need to find out why it didn't in VHDL | 14:37 |
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| xiretza[cis] | ah, guess I was just debugging myself into a corner by simplifying it more and more, works like a charm now with a concurrent when/else rather than an if/else in a process | 15:07 |
| tnt | Wait, I thought I fixed that like a year ago with https://github.com/YosysHQ/nextpnr/pull/1086 | 15:10 |
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