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| singham | Hello | 10:56 |
|---|---|---|
| singham | Yosys is a fantastic initiative. I would love to be active here | 10:56 |
| singham | In nextpnr, if someone can help me find the chipdb step, I can help by lowering it's required RAM usage by contributing | 10:57 |
| singham | I have failed in past to build it on RPI3, and I failed yesterday to build it | 10:57 |
| singham | I use currently hx8k board | 10:59 |
| jn | what do you mean by the chipdb step, and by finding it? | 11:39 |
| singham | The step which requires lots of RAM to build | 12:10 |
| singham | The code in python program which uses memory | 12:11 |
| singham | block of code. | 12:11 |
| * singham was afk | 12:11 | |
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| cr1901 | If I have two modules that are similar (same I/O ports), Is there a way to run a select query that will return "cells in one module but not the other"? | 21:43 |
| lofty | cr1901: select syntax is hierarchical, so if you know the name of that module you can use `c:foo/*`, IIRC | 21:48 |
| cr1901 | Hmmm, nope "select c:leds-bad/*" selects nothing | 21:52 |
| cr1901 | "select leds-bad leds-good %i" returns nothing as well | 21:54 |
| cr1901 | (although I guess that's not surprising, seeing that the intersection is technically... nothing. yosys can't figure out which cells are "the same" in between two modules) | 21:55 |
| jix | cr1901: I don't think there is a way to do it with only a select query, but there might be other ways | 22:12 |
| jix | also when do you consider a cell to be in both modules? will it have the same name? or do you want some structural comparison | 22:12 |
| cr1901 | structural comparison | 22:17 |
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