Wednesday, 2023-04-12

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singhamFolks, OpenFPGA uses skywater-pdk.16:10
singhamHow are the final designs made? The placing of gates, their libraries and connection of wires?16:12
singhamI wanted to know more about physical design if some of you know more16:12
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singhamWhy is the cost of making photomasks so high?18:11
singhamI saw cheapest foundaries have been setup for $5M only18:11
singhamAnd I see on Wiki that photomasks can go around $40M - $100M18:12
singhamI mean come on!18:12
so-offishDepends on the number of them you need, the resolution you're trying to hit, etc18:12
so-offishalso there's some sophisticated processing algorithms that go into them nowadays18:13
so-offishBecause of multipatterning and edge effects18:13
singhamBut still $40M ? Give me a million and I'll write it for you from scratch in the language you want.18:14
singhamI mean it's like a 4 cm^2 thing.18:15
so-offishSo I hand you the algorithm and you... translate it for $1M? lol18:15
singham:D18:15
singhamI'll create the algo. No worries18:16
singhamAt $1M it is doable18:16
so-offishOh your background is computational optics? 18:16
singhamNaah. I took a course in computational physics though18:18
singhamnvm18:18
singhamAah wait18:19
singhamIt's written, "new mask shop"18:19
singhamMask cost from $250 to $100k18:20
singhamin 200618:20
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singhamTypically, FPGAs have how many layers in it's IC?19:19
singhamSay, a chip like iCE40?19:19
singhamLike, there is a transistor, on top of it will there be more?19:20
knielsensingham: There's only one layer of transistors on a chip. On top of that are multiple layers of routing ("wires"), Don't know any numbers, but I think 10-20 layers of routing is not uncommon19:23
singhamWow. 10-20 layers!19:27
singhamAll chips have just 1 layers of transistors?19:28
singhamknielsen: Thank you.19:37
* singham will see you fine hobbits later19:37
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Sarayan10-20 is a lot actually20:23
Sarayaniirc the latest wafers we've done are something like 7 metal layers?20:23
Sarayan(european project, finnish partner)20:24
Sarayanalso, a cmos wafer run for a reasonable node is something like 100K nowadays, not millions20:26
Sarayanhere you can see real prices for mpw runs where you pay by square millimeter: https://europractice-ic.com/schedules-prices-2023/20:29
tpbTitle: EUROPRACTICE | Schedules 2023 (at europractice-ic.com)20:29
so-offish100k is an ancient node though, isn't it?20:54
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SarayanI think it's 28nm or something around that21:08
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Sarayanwhich is good enough for a lot of stuff already, in fact21:08
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whitequarkeven 65 can be okay still, though i think it gets hard to justify for battery powered stuff23:14

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