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| whitequark | I'm not sure if you can do post-synthesis Xilinx simulation with CXXRTL | 15:52 |
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| Guest65 | Hola folks | 16:30 |
| Guest65 | I was looking into variable RISCV_FORMAL | 16:31 |
| Guest65 | in picorv32. | 16:31 |
| Guest65 | What does it do? If I want to instantiate picorv for using it with Native Memory Interface, do I have to instantiate pcpi, lookahead, vars? | 16:32 |
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| singham | RISCV_FORMAL question still remains. I'm on pc now | 16:54 |
| singham | Kindly let me know how to instantiate picorv32 for native memory interface. In case RISCV_FORMAL is an optional variable, please let me know that too | 16:56 |
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| tnt | RISCV_FORMAL is used only for formal verification testing, you don't have to worry about it. | 17:06 |
| singham | So how do I instantiate it? Will just the variables of native memory work? | 17:09 |
| singham | picorv32 core (.clk (clk), .resetn (resetn), .trap (trap ), .mem_valid(mem_valid), .mem_addr (mem_addr ), .mem_wdata(mem_wdata), .mem_wstrb(mem_wstrb), .mem_instr(mem_instr), .mem_ready(mem_ready), .mem_rdata(mem_rdata)) | 17:11 |
| singham | Like this above? | 17:11 |
| singham | Or do I have to add pcpi and trace vars too? | 17:11 |
| tnt | Here's an example https://github.com/smunaut/ice40-playground/blob/master/projects/riscv_usb/rtl/soc_picorv32_base.v#L68 | 17:14 |
| singham | tnt: Wow! Thank you so much.... | 17:25 |
| * singham will be here later | 18:10 | |
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| foxfromabyss | Sorry, i think i wasn't precise enough. with `synth_xilinx -flatten` I get "External blackbox cell `IBUF' is not marked as a CXXRTL blackbox." but I am not sure why it's external. Removing `synth_xilinx -flatten` yields "ERROR: Unknown cell `BUFGCE'". Sorry for the confusion and poor wording. I feel like i am holding it wrong but i can't figure | 21:29 |
| foxfromabyss | out what exactly I am doing wrong : / | 21:29 |
| foxfromabyss | scratch that, i think i figured it out. Thanks! | 22:42 |
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