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| jix | Sarayan: have you tried using async2sync or clk2fflogic before running cxxrtl? that might be a workaround here | 09:54 |
|---|---|---|
| jix | (async2sync for when there's a single clock domain and processing async signals on the next clock edge is enough, clk2fflogic should work in any case) | 09:55 |
| jix | although I have no idea how cxxrtl handles the implicit global clock, but either of those two passes are used to handle async signals for the formal verification flows, for which the backends cannot handle async signals at all | 09:56 |
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| whitequark | iirc it just doesn't | 20:06 |
| whitequark | but try it | 20:06 |
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| Sarayan | jix: it's small enough that I can understand it or even write my own sim. Not an issue. But it was small enough to I think make a useful bug report | 20:59 |
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