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| agg | bjonnh: yea, I have ecp5 dsp working prety well, what are you trying to do? | 01:04 |
|---|---|---|
| bjonnh[m]1 | multiplications for now | 01:10 |
| bjonnh[m]1 | learning and do simple maths for audio samples | 01:10 |
| agg | mult's the easiest, i think yosys will even infer it from a * in verilog, but otherwise you can instantiate a MULT18X18D per the lattice docs and it just works too | 01:12 |
| agg | well 18x18 mult is easy, 9x9 or 36x36 is a bit more of a challenge | 01:13 |
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| agg | you want lattice TN1267 for that | 01:14 |
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| agg | sorry, not sure how much about this you already know so don't want to bore you but i'm happy to chat about it in more detail or answer more questions if you like | 01:14 |
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| bjonnh[m]1 | I know close to nothing | 02:02 |
| bjonnh[m]1 | I just started that | 02:02 |
| bjonnh[m]1 | https://github.com/bjonnh/ulx3s-synth/ | 02:03 |
| bjonnh[m]1 | That's pretty much where I stand | 02:03 |
| bjonnh[m]1 | I wanted to do some FM synthesis so that's pretty heavy on calculations | 02:03 |
| bjonnh[m]1 | (on multiplications) | 02:03 |
| bjonnh[m]1 | audio rate is in the 90kHz range so I suppose that's a lot of time at 25MHz to do things | 02:03 |
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| agg | bjonnh[m]1: ah cool, well i'd start by just writing out a * multiplication in verilog and check the resource usage to see if it synthesised a MULT18X18D or not, that's the easiest thing to start with and should cover most needs | 21:11 |
| agg | ideally aim to do 18x18 wide (or less) multiplications and make sure they're synchronous (i.e. not fully combinatorial, the output is only used after a clock cycle) | 21:12 |
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