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| mithro | https://twitter.com/antonblanchard/status/1580154261962657792 - Introducing github.com/antonblanchard… - a generator of fast and efficient standard cell adders, multipliers and multiply-adders. Written in Amaranth HDL, formally verified with #Yosys. #Verilator verification too With @OpenROAD_EDA + ASAP7 7nm a 32bit 3 cycle multiplier hits 2.7GHz | 16:20 |
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| corecode | nice | 19:11 |
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