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| mewt | Is there a way to add some -chparam within synth_ice40's hierarchy pass? | 00:31 |
|---|---|---|
| mewt | Or do you need to split it out | 00:31 |
| lofty | mewt: just run hierarchy before synth_ice40 | 01:34 |
| mewt | ah that should have worked then | 01:36 |
| mewt | The rerun won't blow it away? | 01:36 |
| mewt | (I think I saw some way to just run a subset of synth_ice40 so I guess absolute worst case I can do read_verilog; hierarchy blablabla; proc; then run the rest of synth_ice40...maybe | 01:38 |
| mewt | ) | 01:38 |
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| RowanG[m] | Is it possible to do some kind of "safe" OTA using an ECP5 + open source toolchain? I want to deploy some ECP5 modules which are connected via ethernet. I want to implement an update procedure. Basically I want to have multiple images in the flash. One "bootloader" bitstream that first boots which can then manually be instructed to load the second image. If the second bitstream doesn't do something within some period of time the FPGA should | 09:42 |
| RowanG[m] | be reset so it returns to the bootloader. | 09:42 |
| RowanG[m] | Is this at all possible with an ECP5? | 09:42 |
| tnt | Well you can't do the "auto-reset" in the FPGA, you'd need some external watchdog for that. | 09:54 |
| tnt | But for the rest, yes, this seems doable. | 09:54 |
| agg | I guess you could have a separate logic circuit in your design that needs to be turned off by the main design and eventually triggers reset if not (you'd need to wire a gpio to the programn pin to trigger the reset)? the ecp5 can automatically reset to a 'golden' image if the main image fails to load at all, too, so hopefully between the two you'd be covered | 12:11 |
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