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josuah | ikskuh: hello! late answer, sorry... I had some troubles with verilog features not being supported by yosys | 14:32 |
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josuah | so eventually there will be warnings issued | 14:32 |
josuah | if you suspect one signal in particular, you could also inspect the """ "bits": { 1, 2, 2, 3, 3, 3, 3 }, """ (example numbers) sections of the verilog file | 14:34 |
josuah | if instead of numbers, there are """ "bits": [ "x", "x", "x" ] """, but the signal should be used, maybe something wrong did happen | 14:35 |
josuah | in that case, upgrading yosys could eventually help | 14:35 |
ikskuh | josuah: thanks, i figured it out | 14:42 |
ikskuh | i was ... quite stupid :D | 14:42 |
ikskuh | what also happened was that the bram took some clocks to be initialized | 14:42 |
ikskuh | so the first memory fetch was still 0 | 14:42 |
josuah | I am not sure I could figure as much :) glad it did! | 14:45 |
ikskuh | yeah, i'm pretty good at debugging random shit ^^ | 14:52 |
ikskuh | logic analyzer with 8 bit output is quite helpful | 14:52 |
ikskuh | last thing i logged was just the data on the bus | 14:52 |
ikskuh | and i recognized "B7" which was the second data word | 14:52 |
ikskuh | and before that was "00" which was definitly not what i was expecting | 14:52 |
ikskuh | introducing a 3 clock delay and it worked | 14:53 |
josuah | in the various tooling for HDL, I see a lot of coverage for the happy path, but not so much for the "oops, that went unexpected" | 15:23 |
josuah | like large complex verification libraries and ecosystem | 15:24 |
josuah | but what if you need to debug a bug *through* all of these layers, with no idea on which layer it might be | 15:24 |
josuah | for that, having a very thin layer and tools targetted at inspection help | 15:25 |
josuah | > logic analyzer | 15:26 |
josuah | like this :) | 15:26 |
josuah | ikskuh: may I ask which one do you have? | 15:26 |
josuah | I had not much luck with sigrok on my side | 15:26 |
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ikskuh | i have a cheap SALEAE clone | 15:44 |
ikskuh | 80€ with shipping from aliexpress | 15:44 |
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