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| cr1901 | ERROR: Unsupported or unknown directionality on port PAD of cell gate.\$iopadmap$top.clk ($paramod\FACADE_IO\DIR=t40'0100100101001110010100000101010101010100). <-- I'm guessing that's a fancy way of saying "the SMT2 backend does not support tristates" | 18:04 |
|---|---|---|
| cr1901 | ?* | 18:05 |
| mwk | inout ports actually, but yes | 18:15 |
| mwk | this is what -noiopad is for, btw | 18:15 |
| cr1901 | Yes, and I have a testcase where nextpnr breaks a yosys design where noiopad was used | 18:16 |
| cr1901 | and have been talking to gatecat about this in DM and am unsure whether I should just plain remove -noiopad from synth_machxo2 and error out if nextpnr sees an I/O signal w/o a pad | 18:17 |
| cr1901 | and fix synth_smt2 | 18:17 |
| cr1901 | or what | 18:17 |
| mwk | -noiopad is meant for two things | 18:17 |
| mwk | formal verification and out-of-context mode | 18:18 |
| mwk | it should stay for these two | 18:18 |
| mwk | ... out-of-context is probably not particularly important for a tiny device, but still | 18:18 |
| cr1901 | Right, I'm using it to create a miter to compare pre and post-pnr designs | 18:18 |
| mwk | but, hm | 18:18 |
| cr1901 | That's a reasonable use case, yes? | 18:18 |
| mwk | post-pnr is tricky because these IO cells are left | 18:19 |
| mwk | but... you can use techmap to flatten the FACADE_IO definition into the design, which will result in no more inout ports | 18:19 |
| cr1901 | is deminout also required? | 18:19 |
| cr1901 | (That was my next step, btw) | 18:19 |
| mwk | no | 18:19 |
| mwk | if you replace the cells with their insides via techmap, there won't *be* a port | 18:20 |
| mwk | inout or otherwise | 18:20 |
| cr1901 | I was going to say "but FACADE_IO has a tristate in its definition", but... no it doesn't: https://github.com/YosysHQ/yosys/blob/master/techlibs/machxo2/cells_sim.v#L162-L169 | 18:22 |
| cr1901 | I think I'm worried whether SMT2 can handle PAD being used on both the RHS and LHS of an assign | 18:22 |
| cr1901 | (even after flattening) | 18:22 |
| cr1901 | but I'll try and see what happens | 18:22 |
| mwk | there may also be a tribuf that needs some handling | 18:23 |
| cr1901 | In all my designs I'm testing I don't actually use tristate functionality, so it should all "go away" with a sufficient number of yosys passes :P | 18:24 |
| mwk | ... assuming they actually work | 18:25 |
| mwk | tribufs are... let's just say I don't trust our handling of those | 18:25 |
| cr1901 | I have faith | 18:25 |
| cr1901 | (for now) | 18:25 |
| mwk | .. I consider it more likely than not that you'll uncover some bugs | 18:26 |
| mwk | as in, in yosys core | 18:26 |
| cr1901 | I'll at least report them, but I'm not sure how useful I'll be fixing them. Part of the reason I want to create miters is because I don't trust that my models are mistake-free compared to yosys' built-in ones | 18:27 |
| cr1901 | (It's also fun for some value of fun) | 18:28 |
| cr1901 | FWIW, if you try to run nextpnr when you have -noiopad enabled, it'll turn this Verilog: http://gopher.wdj-consulting.com:70/paste/453d20f1-f63a-4e1a-bb42-dcf3282084f9.txt | 18:34 |
| cr1901 | into this: http://gopher.wdj-consulting.com:70/paste/768a2159-e79b-46cd-b109-5c93239a4bb2.txt | 18:35 |
| cr1901 | This is fine and definitely what I intended :) | 18:35 |
| cr1901 | So indeed, maybe it's better to just plain error out instead of trying to pnr this | 18:36 |
| mwk | ... I would recommend either fixing the nextpnr bug here properly by auto-adding IOBs, or making it a hard error to have a pin with a missing IOB | 18:37 |
| mwk | yes | 18:37 |
| cr1901 | I do not support auto-adding IOBs at all, in fact I remove them forcefully during packing (I'm not sure if the auto-IOB functionality is going away or not, but I don't want to deal w/ them) | 18:38 |
| cr1901 | See: https://github.com/YosysHQ/nextpnr/blob/master/machxo2/pack.cc#L232-L246 | 18:38 |
| cr1901 | I guess I just expected nextpnr to "do the right thing" even without the I/O pads :P | 18:39 |
| cr1901 | oops... | 18:39 |
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| cr1901 | So how do you pass info about whether nextpnr_iobuf's ports were split or not up to the arch implementation? https://github.com/YosysHQ/nextpnr/blob/ee65e6f32d669cabd1d8a00534410da423348ac4/frontend/json_frontend.cc#L200 | 19:30 |
| cr1901 | Maybe the context keeps that info... checking | 19:32 |
| cr1901 | doesn't appear to. Maybe I'll add that info as part of the MachXO2 bug fix PR (won't affect other backends right now) | 19:46 |
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| mwk | split? | 21:20 |
| cr1901 | mwk: https://github.com/YosysHQ/nextpnr/blob/ee65e6f32d669cabd1d8a00534410da423348ac4/frontend/frontend_base.h#L590-L610 | 21:22 |
| cr1901 | if split_io is set, nextpnr_iobuf has a separate I and O port (default for JSON) | 21:23 |
| cr1901 | if not, nextpnr_iobuf has a single IO port | 21:23 |
| cr1901 | If I'm detecting whether FACADE_IO is attached to a nextpnr_*buf, I should know which ports a nextpnr_iobuf has | 21:24 |
| cr1901 | (okay realistically, I can just check "I" and "O" unconditionally for now) | 21:24 |
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