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| ZipCPU | dormito: The multiple drivers complaint should come attached to a signal that it's complaining about. That should lead you to the relevant Verilog statement. | 11:29 |
|---|---|---|
| dormito | ZipCPU: I figured it out. the signal in question had only 1 assign... but it's logic was basied of another signal which had two assigns (obviously wrong). Not quite sure why the error message had the output signal (and not the one that was multiply assigned) | 11:31 |
| ZipCPU | Fascinating. Not what I would've expected, but glad to hear you figured it out. | 11:33 |
| tnt | dormito: because if two signals are identical, there is only 1 signal ... and the name that will be kept is a bit of a toss-up. | 11:33 |
| dormito | while I don't know too much about yosys/nextpnr internals (yet). I suspect it was some sort of optimzation that "flattened" the intermidate signal out | 11:34 |
| dormito | tnt: thanks for the info | 11:39 |
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