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| mithro | https://ieeexplore.ieee.org/abstract/document/9712533 - FPGA-Accelerated Maze Routing Kernel for VLSI Designs | 01:01 |
|---|---|---|
| tpb | Title: FPGA-Accelerated Maze Routing Kernel for VLSI Designs | IEEE Conference Publication | IEEE Xplore (at ieeexplore.ieee.org) | 01:01 |
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| cr1901 | The last time I saw someone use machine learning for FPGA PnR, it would route designs that worked due to analog effects/coupling between otherwise-unconnected wires :P. | 02:34 |
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| xiretza[m] | <cr1901> "The last time I saw someone..." <- if it's stupid and it works... :p has anyone ever made a followup to that paper to improve temperature/part consistency? | 07:17 |
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