Thursday, 2021-08-12

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sf-slack<sdamghan> Thanks @mkurc , I tried to utilize this feature in tcl script, however, it seems for `keep_hierarchy` attribute it is not effective. It is worth noting that once I used (* keep_hierarchy *) for the same module inside the Verilog code it works as expected. `Tcl script: read_verilog -nomem2reg spram.v setattr -mod -set keep_hierarchy 1 spram ...`  `Spram.v module spram (inputs, output) ...`  In this scenario, once I use01:16
sf-slack`flatten` in Yosys, the spram will change to Yosys internal memory. However, in the following case:  `Spram.v` `(* keep_hierarchy *)` `module spram (inputs, output)` `...`  Yosys works as expected and does keep the spram module intact when I output a coarse-grain netlist. 01:16
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mithro@tmichalak / @acomodi - https://opensource.googleblog.com/2021/08/introducing-data-validation-tool.html -- I'm unclear if this could be helpful in the dashboard work at all?18:01
tpbTitle: Introducing the Data Validation Tool | Google Open Source Blog (at opensource.googleblog.com)18:02
mithrohttps://github.com/GoogleCloudPlatform/professional-services-data-validator18:09
jnHi, a prjxray question: i ran download-latest-db.sh in the prjxray repo, and it cloned the auto-generated database repo. which file do i have to pass to nextpnr-xilinx with the --chipdb option?19:55
jn(for context: i want to run a minimal yosys+nextpnr flow for my artix7 board)19:56
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gatecatjn: https://github.com/gatecat/nextpnr-xilinx#building-the-arty-example---xray-database hopefully still works21:10
jnit fails to find tilegrid.json:  FileNotFoundError: [Errno 2] No such file or directory: '/home/user/git/nextpnr-xilinx/xilinx/python/../external/prjxray-db/artix7/xc7a100tcsg324-1/tilegrid.json'21:17
jnwhich is in the xc7a100t directory, AFAICS21:18
jn(i.e. the directory without the package type and speed grade in the name)21:18
gatecatright, it's not been maintained for a long time and only ever been tested with whatever old prjxray-db version it includes as a submodule21:19
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