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tpb | <mkk__> [mgielda, skywater-pdk] hi everyone - just heads up about an upcoming talk from CHIPS Alliance about dynamic scheduling in Verilator: https://twitter.com/CHIPSAlliance/status/1400526950448254977/ - this will be part of a monthly series, see https://chipsalliance.org/workshops-meetings/ | 16:13 |
tpb | <tpb> <https://x0.no/4uxjx> (at twitter.com) | 16:13 |
tpb | <mkk__> [mgielda, skywater-pdk] it's next Tuesday, 8 AM Pacific | 16:13 |
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tpb | <mkk__> [Mehdi Saligane, skywater-pdk] Hi Everyone, is anyone able to synthesize systemVerilog using the latest of Yosys? | 21:22 |
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