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| sthornington | hi folks, back at fpga stuff after a multi-year break. can someone point me to the current best way to do fully open source synthesis and pnr of XC artix 7 boards ? | 00:50 |
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| mithro | Anyone here at Latchup? | 13:55 |
| mithro | https://fossi-foundation.org/latch-up/2024 | 13:55 |
| tpb | Title: Latch-Up 2024: April 19-21, 2024 in Cambridge, MA, USA (at fossi-foundation.org) | 13:55 |
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| lambda | sthornington: xilinx is tricky, you can give https://github.com/gatecat/nextpnr-xilinx a try | 15:30 |
| gurki | esp after a multi-year break you should start out with vivado imho | 15:30 |
| lambda | they were pretty clear in wanting a FOSS toolchain, the fact that a vendor toolchain exists is well known I think | 15:31 |
| gurki | i was making the point that hes gonna make his life quite hard with the plan he set out for himself. | 15:32 |
| gurki | he does not need to agree or listen to me, but its a point that should be made. | 15:33 |
| gurki | the xilinx flow clearly is not at a "you can use this if youre no already familiar with everything" stage | 15:33 |
| lambda | honestly it absolutely can be, but there are hard to predict sharp corners | 15:37 |
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| mcc111[m] | Hello, I am trying to modify someone else's litex code but I don't fully understand how it works yet.... (full message at <https://catircservices.org/_matrix/media/v3/download/catircservices.org/NMXfQXTTrkLpVQNURngUHDwk>) | 18:15 |
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| cr1901 | Is there any best practice for interfacing a LiteX SoC to a peripheral written in Amaranth (specifically automating Verilog generation as part of attaching the peripheral to the LiteX SoC). I know Minerva is an Amaranth CPU, but I'm specifically interested in peripherals | 19:04 |
| sthornington | Thanks, I'll check it out, just a bit confusing with all the old links to "xray" and whatnot, I'm working within LiteX and plan to stay there this time around, so the vivado flow is fine, just slow. I miss yosys. | 19:10 |
| sthornington | I would probably have to go cross-check that all the hard things that are getting used (xilinx pcie phy etc?) are supported by the open source tools. but it was more just a curiosity, wondering whether the oss flow had gotten to the point of flipping a switch in LiteX somewhere which causes it to try to use the oss tools. | 19:13 |
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