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| somlo | _florent_: I accidentally noticed the FIXME comment here: https://github.com/enjoy-dighttps://github.com/enjoy-digital/litex/blob/master/litex/soc/integration/soc.py#L1141ital/litex/blob/master/litex/soc/integration/soc.py#L1141 | 14:05 |
|---|---|---|
| somlo | and was wondering, in re. Rocket (and the fact that its RAM starts at 0x8000_0000) what I'm missing (since it seems to work) :) | 14:07 |
| somlo | what do you mean by the comment that the dma region "covers lower 4GB only" ? | 14:07 |
| somlo | thinking mainly about issue #1753, and whether this has anything to do with Rocket DMA being broken when using LiteX AXIUpConverter, but working when rocket does its internal LiteDRAM width matching | 14:09 |
| somlo | LMK if this is better done over email (or as part of #1753 itself) :D | 14:10 |
| somlo | sorry, noticed my cut'n'paste screwup earlier, the line I'm talking about is: https://github.com/enjoy-digital/litex/blob/master/litex/soc/integration/soc.py#L1141 | 14:11 |
| _florent_ | somlo: Hi, I was doing these change for NaxRiscv, but the # FIXME was already there. The change I did change a little bit the behavior for Rocket, since now the interconnect will be in 64-bit (the width of the DMA bus) and SDCard/SATA modules connecting to it will be converted to 64-bit. (Before the interconnect was 32-bit and there was a converter to the DMA bus in 64-bit). | 14:42 |
| _florent_ | I'll have a closer look at the FIXME, to see if that's still relevant | 14:42 |
| somlo | right, I noticed it was there before too, and dma with rocket also worked before (issue #1753 was filed before this change :) | 14:44 |
| somlo | I'm still building the post-change bitstream but assume it will be the same as before (dma works at least when rocket does its own litedram width matching) | 14:45 |
| somlo | but the change made me notice the fixme, and wonder what it actually means :) | 14:45 |
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| josuah | 0x80000000 is less than 4GB? | 19:45 |
| josuah | 4GB limitation sounds a lot like only supporting 32-bit of address space | 19:46 |
| josuah | but maybe I misunderstood your question. | 19:46 |
| somlo | joshuah: thanks, that makes sense -- I got a bit confuzzled in my binary/hex arithmetic :D | 19:52 |
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