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| somlo | _florent_: here's the patch I'm working on to add a simplified Rocket naming convention: https://github.com/enjoy-digital/litex/compare/master...gsomlo:litex:gls-new-rocket-variants#diff-e8b2dd6d0203ed0aaf32e33305d3697381d4da6ec3f56dabe8470306e01cb0e9R78 | 00:25 |
|---|---|---|
| somlo | before I commit, I wanted to ask if there's an easy way to log an error from the args_read() method (lines 78 and 82 in the github link above) | 00:26 |
| somlo | i.e., I want a warning or error logged if the requested number of CPU cores is anything other than [1, 2, 4, 8] -- the pre-elaborated verilog sub-variants in pythondata-cpu-rocket | 00:27 |
| somlo | ditto for memory-bus widths (1x, 2x, 4x, and 8x 64bit) | 00:28 |
| somlo | no other cpu model throws errors or warnings anywhere under litex/soc/cores/cpu/*, so I had no previous examples available for cargo-culting :D | 00:29 |
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| droiddbot | Hey | 14:50 |
| droiddbot | Hey | 14:51 |
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| cmmon | Hey | 14:51 |
| cmmon | I am new to litex | 14:55 |
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| bl0x | o/ | 18:45 |
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