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| MoeIcenowy | _florent_: btw I am thinking how does LiteX keep the register layout of mainline-Linux-supported cores? | 07:32 |
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| MoeIcenowy | _florent_: I suddenly realized openc906 is not in test/test_cpu.py, however maybe if I add it it will fall into "untested" like rocket? | 15:18 |
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| _florent_ | MoeIcenowy: For the linux supported cores, we are avoiding register interface changes for now but indeed discuss about putting something in place. This could be an API version register that would always be read at the location. | 20:13 |
| _florent_ | MoeIcenowy: For OpenC906, if it's passing test_cpu in CI, we could test it. For rocket, IIRC the issue was related to Github CI, maybe limiting the number of jobs as shenki_ just did for Microwatt would work | 20:14 |
| cr1901 | Do device trees allow register layouts to change (in addition to dynamically defining "where's all the peripherals"? | 20:33 |
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| zyp | I think they only define the base address for the whole register block, not the order of individual registers | 22:09 |
| tnt | Well, technically you "could" have DT bindings where every sub-reg address is configurable, but it'd be a major pain. | 22:17 |
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