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| kanunay | Has anyone built a standalone liteSATA core? I'm trying to do this but cannot get DMA to work. | 19:27 |
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| _florent_ | kanunay: I did it yes, what is the issue? Have you tried running a design similar to the bench on your board? | 19:58 |
| _florent_ | https://github.com/enjoy-digital/litesata/tree/master/bench | 19:58 |
| _florent_ | I would first recommend getting this running on your board | 19:58 |
| _florent_ | and verify correct operation of test_init/test_bist and test_dma | 19:59 |
| _florent_ | kanunay: If the link is initialized correctly on your hardware and have a specific question regarding the user_port/dma, I can also probably answer it | 20:00 |
| kanunay | The link initializes and i can get identify to work. Read doesn't work: done stays 0. Error also stays 0. | 20:15 |
| kanunay | If i specify an invalid sector number, both done and error get set 1. | 20:15 |
| kanunay | The read never seems to begin data transfer (no cyc or stb on the wishbone dma bus) | 20:16 |
| _florent_ | the standalone generator is not integrating the DMA, have you integrated it yourself? | 20:24 |
| _florent_ | or are you using the native user port? | 20:24 |
| kanunay | I'm attempting to integrate DMA myself. I am modifying something that previously used litesdcard. | 20:46 |
| kanunay | self.add_sata(phy=self.sata_phy, mode="read+write") appears to generate correctly. I'm missing something but don't know what it is. | 20:51 |
| kanunay | the generated module has a ctrl bus and dma bus, like litesdcard. Earlier I had tried adding the components and connecting them individually - and that got identify to work. | 20:52 |
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| hcab14 | This is a follow-up to https://github.com/enjoy-digital/liteeth/pull/104. I guess with using packet delimiters you mean to use `last`. Unfortunately this does not seem to work for me. sending counters with `dw=32` on a scaled down clock and toggling `last` the UDP packet sizes are alternatinly 260 bytes (FIFO size 64, (64+1)* 4 bytes=260 bytes) and | 21:22 |
| hcab14 | 4 bytes. I'd be grateful for any advice | 21:22 |
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| somlo_ | http://www.contrib.andrew.cmu.edu/~somlo/BTCP/litex_fedora_boot.mp4 | 23:21 |
| somlo_ | http://www.contrib.andrew.cmu.edu/~somlo/BTCP/litex_fedora_boot.log for those of you who'd rather not watch a slow video :) | 23:21 |
| somlo_ | I'll work on upstreaming a proper fix for the Linux LiteUART driver over the next few days -- it's the reason for the intermittent crashes around the time of the login prompt | 23:22 |
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| cr1901 | It takes 8 mins to boot modern Linux at 50MHz :o? | 23:26 |
| somlo_ | I blame systemd :P | 23:26 |
| somlo_ | a busybox initrd boots in 20-ish seconds :) | 23:27 |
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