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cr1901 | _florent_: If using a USB UART, is there a way to prevent the serialboot routine from blocking until the serial device is open on the OS side? | 17:22 |
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_florent_ | cr1901: You can probably do this:https://github.com/360nosc0pe/scope/blob/main/sds1104xe.py#L132 | 17:40 |
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cr1901 | ahhh okay, cool | 17:42 |
cr1901 | interval parameter is for what? | 17:43 |
cr1901 | actually, what do the parameters mean? | 17:43 |
Prometheus6765 | Hello all, I am a complete beginner and I have been reading all I could to simulate an minimal SoC with Litex. Could Somebody help me? | 17:45 |
_florent_ | cr1901: the code is here, happy to answer questions if not clear enough:https://github.com/enjoy-digital/litex/blob/master/litex/soc/cores/uart.py#L281-L298 | 18:19 |
_florent_ | Prometheus6765: Hi, feel free to ask specific questions if issues while running the simulation | 18:19 |
cr1901 | _florent_: I think I get it. autoflush sits between the PHY and the TX buffer. | 18:35 |
cr1901 | If timeout has passed, begin flushing the TX buffer one char at a time every interval clock cycles | 18:36 |
cr1901 | Is timer.done equal to 0 when timer.wait is equal to 0? | 18:37 |
cr1901 | https://github.com/enjoy-digital/litex/blob/master/litex/soc/cores/uart.py#L295 | 18:37 |
cr1901 | I.e. if the source _is_ in fact ready, does timer.done immediately assert, or will it still wait for timeout before starting to send out the char | 18:40 |
Prometheus6765 | Thanks. Is there a good tutorial other than the Wiki? | 19:01 |
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ilia__s | Prometheus6765: I have https://github.com/sergachev/litex-template which has everything to simulate a firmware running within a SoC (so that's litex_sim and verilator under the hood) with `poetry run python src/main.py --sim --run` | 21:43 |
ilia__s | basically main.py, platform_sim.py, soc_base.py and firmware in src/ there are sufficient to create a simulation | 21:44 |
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