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| _florent_ | yootis: the delay is useful when you are doing the loopback externally and RX/TX are decoupled (ex on the XTRX project, this is useful when doing the loopback through the full digital chain: DMA Reader -> XTRX (DLB) -> DMA Writer) | 06:17 |
|---|---|---|
| _florent_ | I'll continue on this this week so could do more tests | 06:18 |
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| Guest39 | how to use litex | 09:19 |
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| SpaceCoaster | Something odd happens with LiteSPI, for reads it is sending the mapped memory address to the flash. For instance if the flash is mapped at 0x0080000 then address 0x80000 is being sent to access the first byte of flash. I guess the flash is wrapping and ignoring that high bit. | 19:09 |
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| SpaceCoaster | Also soc.py calls check_if_exists for name_mmap then creates name_core. I think that is due to history as mmap appeared all over the place and has been replaced by core. | 19:27 |
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