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| mikek_DE1SOC | Hi Florent: I am getting a new error when trying to compile a Linux-on-litex-vesrisc.. | 18:47 |
|---|---|---|
| mikek_DE1SOC | Traceback (most recent call last): | 18:47 |
| mikek_DE1SOC | File "./make.py", line 746, in <module> | 18:47 |
| mikek_DE1SOC | main() | 18:47 |
| mikek_DE1SOC | File "./make.py", line 727, in main | 18:47 |
| mikek_DE1SOC | soc.generate_dts(board_name) | 18:47 |
| mikek_DE1SOC | File "/home/mikek/Documents/Cyclone5_SOC/Litex_New_release_Nov2021/linux-on-litex-vexriscv/soc_linux.py", line 164, in generate_dts | 18:47 |
| mikek_DE1SOC | dts_content = generate_dts(json.load(json_file), polling=False) | 18:47 |
| mikek_DE1SOC | File "/home/mikek/Documents/Cyclone5_SOC/Litex_New_release_Nov2021/litex/litex/tools/litex_json2dts_linux.py", line 68, in generate_dts | 18:47 |
| mikek_DE1SOC | linux_initrd_start = d["memories"]["main_ram"]["base"] + initrd_start, | 18:47 |
| mikek_DE1SOC | KeyError: 'main_ram' | 18:47 |
| mikek_DE1SOC | (Litex_Nov2021) mikek@mike-AERO-17:~/Documents/Cyclone5_SOC/Litex_New_release_Nov2021/linux-on-litex-vexriscv$ | 18:47 |
| mikek_DE1SOC | I did a litex-setup --update.. | 18:47 |
| mikek_DE1SOC | FYI I have also got to work in litex-boards (De1Soc) already there, the Deca Board and the DE10-Nano with my Sram that I got.. | 18:51 |
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| mikek_DE1SOC | Good news is that Litex-boards build and loads fine. | 19:00 |
| mikek_DE1SOC | Sorry that this seems so simple.. | 19:10 |
| mikek_DE1SOC | I am new and still learning... :) | 19:10 |
| mikek_DE1SOC | DOH I am sorry!!! | 19:19 |
| mikek_DE1SOC | I got it.... | 19:19 |
| mikek_DE1SOC | I was playing in the litex boards file and delected out my RAm.... | 19:19 |
| mikek_DE1SOC | DOH!!!!! | 19:19 |
| mikek_DE1SOC | Solved... | 19:20 |
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| jevinskie[m] | Luckily you can just download more RAM with `git checkout` ;) | 23:07 |
| sajattack[m] | Assuming github is online | 23:29 |
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