| *** tpb <[email protected]> has joined #litex | 00:00 | |
| *** shorne <[email protected]> has quit IRC (Ping timeout: 252 seconds) | 02:00 | |
| *** TMM_ <[email protected]> has quit IRC (Quit: https://quassel-irc.org - Chat comfortably. Anywhere.) | 02:28 | |
| *** TMM_ <[email protected]> has joined #litex | 02:28 | |
| *** Degi_ <[email protected]> has joined #litex | 03:41 | |
| *** Degi <[email protected]> has quit IRC (Ping timeout: 268 seconds) | 03:43 | |
| *** Degi_ is now known as Degi | 03:43 | |
| *** alainlou <[email protected]> has joined #litex | 03:45 | |
| *** alainlou <[email protected]> has quit IRC (Quit: Client closed) | 05:03 | |
| *** FabM <[email protected]> has joined #litex | 07:30 | |
| *** michalsieron <[email protected]> has joined #litex | 08:02 | |
| *** shorne <[email protected]> has joined #litex | 10:34 | |
| *** TMM_ <[email protected]> has quit IRC (Quit: https://quassel-irc.org - Chat comfortably. Anywhere.) | 12:09 | |
| *** TMM_ <[email protected]> has joined #litex | 12:09 | |
| *** alainlou <[email protected]> has joined #litex | 13:25 | |
| tnt | Ah, I was hoping just adding a USPPCIEPHY(platform, platform.request("pcie_x4") would give me PCIe, I guess that was a bit optimistic. | 13:51 |
|---|---|---|
| tnt | https://pastebin.com/ebJ5BSvw | 13:56 |
| tpb | Title: INFO: [Device 21-403] Loading part xczu11eg-ffvf1517-1-ixit::create_sub_core: - Pastebin.com (at pastebin.com) | 13:56 |
| tnt | That's the first suspicious looking thing in the logs. | 13:56 |
| *** FabM <FabM!~FabM@armadeus/team/FabM> has quit IRC (Quit: Leaving) | 14:50 | |
| *** Martoni42 <Martoni42!~Martoni@2a03:d604:103:600:2ad2:44ff:fe23:2f72> has joined #litex | 16:27 | |
| *** michalsieron <[email protected]> has quit IRC (Quit: michalsieron) | 17:58 | |
| *** Martoni42 <Martoni42!~Martoni@2a03:d604:103:600:2ad2:44ff:fe23:2f72> has quit IRC (Ping timeout: 268 seconds) | 19:28 | |
| _florent_ | tnt: The PHY were generated using Vivado 2018.2, you'll maybe find updated version here: https://github.com/antmicro/virtex-ultrascale-pcie | 19:54 |
| tnt | _florent_: tx. I actually got is synthesizing. Issue is the xci needs to have the proper Quad Selection since it doesn't look at the pins but at what GTH are selected in the XCI. | 20:01 |
| tnt | And to make matter worse, this board doesn't use the "default" GTH assinged to the PCIe block, but some other one, so you need to "Enable Quad Selection" in the advanced tab as well which took some time to figure out. | 20:02 |
| tnt | I got an updated XCI and that build now, just failing timing because there is no "false path / max delay" constaint between the system/main clock domain and the pcie domain. Trying to figure out how to add that. | 20:03 |
| _florent_ | tnt: for the fasle path, this should be similar to: https://github.com/litex-hub/litex-boards/blob/master/litex_boards/targets/sqrl_acorn.py#L107-L112 | 20:09 |
| _florent_ | or | 20:09 |
| _florent_ | platform.toolchain.pre_placement_commands.append("set_false_path -from [get_clocks txoutclk_out[3]] -to [get_clocks clkout]") | 20:09 |
| _florent_ | platform.toolchain.pre_placement_commands.append("set_false_path -from [get_clocks clkout] -to [get_clocks txoutclk_out[3]]") | 20:10 |
| tnt | Ah ok, I was looking at some pcie example and they didn't have anything special so I was wondering. | 20:15 |
| tnt | btw, I see most pcie examples are x4. Is x8 tested / working ? Is there some caveat ? | 20:16 |
| tnt | (constraint worked btw, timing met now) | 20:25 |
| _florent_ | x8/x16 have been tested yes: https://github.com/enjoy-digital/litepcie/blob/master/examples/xcu1525.py#L47-L49 | 20:40 |
| tnt | Ah right, I was only looking in litex_boards for examples. | 20:43 |
| jevinskie[m] | Ah I see where some of my confusion comes from: kc705 is using gmii while the intel max10 dev kit uses RGMII. Looks like litex doesn’t support mode switching for RGMII yet. On 88e1111 with rgmii the tx_clk isn’t generated by the phy but by the mac and is presented on gtx_clk | 22:05 |
| *** pftbest_ <[email protected]> has joined #litex | 22:10 | |
| *** pftbest <[email protected]> has quit IRC (Read error: Connection reset by peer) | 22:10 | |
| *** pftbest_ <[email protected]> has quit IRC (Ping timeout: 252 seconds) | 22:17 | |
| *** pftbest <[email protected]> has joined #litex | 22:19 | |
Generated by irclog2html.py 2.17.2 by Marius Gedminas - find it at https://mg.pov.lt/irclog2html/!