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sajattack[m] | is there a group I can add my user to so I don't need sudo for litepcie_util et al? | 05:14 |
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sajattack[m] | oh, do I just chmod /dev/litepcie0? | 05:15 |
sajattack[m] | trying to write the rust equivalent of liblitepcie | 05:32 |
sajattack[m] | and don't really want my test runner running as root | 05:32 |
sajattack[m] | got this working, pretty pleased | 05:58 |
sajattack[m] | https://hatebin.com/ehcdvetpaz | 05:58 |
tpb | Title: hatebin (at hatebin.com) | 05:58 |
sajattack[m] | with my own litepcie_readl and litepcie_writel | 05:59 |
sajattack[m] | not just bindings | 05:59 |
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jevinskie[m] | sajattack: I was able to make a litex_privesc runner for litex_sim that uses ambient capabilities to set up networking but I’m not sure if there is a capability for pcie access (same one as dev/mem maybe?) | 07:36 |
sajattack[m] | I haven't used the sim much | 07:36 |
sajattack[m] | I'm trying to run litex linux with the uart using litepcie | 07:37 |
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sajattack[m] | so I don't need a ftdi cable going into my pc basically lol | 07:38 |
sajattack[m] | oh, you were referring to my question about the privileges | 07:38 |
sajattack[m] | yeah it's probably whatever in linux mounts stuff with certain privileges | 07:39 |
sajattack[m] | too lazy to google rn, happy to just chmod | 07:40 |
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bluecmd | sajattack: did you manage to figure out your PCIe issue in the end? | 19:35 |
sajattack[m] | not for linux-vexriscv | 19:35 |
sajattack[m] | I've got the litex-boards pcie working | 19:36 |
sajattack[m] | but the linux just seems broken when I try to add pcie to it | 19:36 |
kbeckmann | _florent_: Just an update regarding the SDRAM read latency we discussed earlier: I managed to get the latency down to 10 cycles in the worst case (@50MHz). I changed to 1:1 gearing, and a 16 bit read port. I also drive the bus data signals with the read port directly while rdata.valid is high, so saved a cycle there too. I disable the refresh timer while a transaction is active (~100us in the worst | 22:21 |
kbeckmann | case). Have tested it now with default speeds and it seems to work quite well. | 22:21 |
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jevinskie[m] | kbeckmann: awesome news! :) | 23:35 |
jevinskie[m] | I realized I can get 128 bits, four words per DFI cycle not one as I was misunderstanding, on the arty and that might just make my SPI emulator feasible with enough readahead | 23:37 |
jevinskie[m] | @florent: is it expected that the sdram_calib will KO with errors on an arty with current, unmodified litex repos? That’s what I’m seeing even though the memtest reports OK | 23:39 |
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