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| F4PGASlackBridge | <fahrenkrog> Question... Regarding Xilinx's announcement that they are joining ChipsAlliance if I understand correctly, what does it mean for F4PGA in practical terms and project development? Will I be able in some not too distant future go to Xilinx's webpage and find docs on how to do some open source project? | 04:18 |
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| lkcl | that would be fantastic | 11:56 |
| lkcl | gatecat: btw you will be delighted to know that libre-soc's core using nmigen works with nextpnr-xilinx on a digilent arty a7-100t | 12:11 |
| lkcl | i have the patches upstreamed in nmigen to support nextpnr-xilinx, i had to alter them slightly because there are FPGA IOpads that are actually supported which symbiflow does not | 12:12 |
| lkcl | i did however have to use symbiflow's FPGA prjxray-db | 12:13 |
| lkcl | like microwatt, libre-soc is *big* (it's just how ppc64 is, particularly when you have an MMU) so is using something like 60% of the 100t iirc, and that's with drastically-reduced-size L1 caches | 12:15 |
| lkcl | so it's a good litmus stress-test, pushing the boundaries of nextpnr-xilinx | 12:15 |
| lkcl | build time is *significantly* less than for symbiflow. | 12:16 |
| lkcl | iirc, somewhere around the 10-15min mark as opposed to [of-the-order-of] 90m for symbiflow, for the exact same design | 12:17 |
| F4PGASlackBridge | <hansfbaier> Is the soc available on GitHub? | 15:16 |
| lkcl | hansfbaier: we run our own git servers (otherwise "Libre" is meaningless!). https://git.libre-soc.org | 15:31 |
| tpb | Title: git.libre-soc.org Git (at git.libre-soc.org) | 15:31 |
| lkcl | easiest automated way to get reproducible unattended installs is with the devscripts https://libre-soc.org/HDL_workflow/devscripts/ | 15:32 |
| tpb | Title: devscripts (at libre-soc.org) | 15:32 |
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| cr1901 | Is there a mapping of old repos to new names anywhere? | 22:20 |
| cr1901 | Okay for the f4pga tools I have checked out, I needed to make the following adjustments: | 22:36 |
| cr1901 | (These were all done via symlinks from a directory called "f4pga", and symlink to dirs with a directory called "symbiflow", btw) | 22:37 |
| cr1901 | symbiflow-arch-defs => f4pga-arch-defs | 22:37 |
| cr1901 | python-symbiflow-v2x => f4pga-v2x | 22:37 |
| cr1901 | yosys-symbiflow-plugins => yosys-f4pga-plugins | 22:37 |
| cr1901 | vtr-xml-utils => vtr-xml-utils | 22:38 |
| cr1901 | vtr-verilog-to-routing => vtr-verilog-to-routing | 22:38 |
| cr1901 | I need to update where the default branches are pointing next, so I'll have a similar list for those soon | 22:38 |
| cr1901 | https://github.com/SymbiFlow/python-symbiflow-v2x.git => https://github.com/chipsalliance/f4pga-v2x.git | 22:43 |
| cr1901 | https://github.com/verilog-to-routing/vtr-verilog-to-routing.git stays the same | 22:44 |
| cr1901 | https://github.com/SymbiFlow/vtr-xml-utils.git => https://github.com/chipsalliance/vtr-xml-utils | 22:45 |
| cr1901 | https://github.com/chipsalliance/f4pga-v2x stays the same (looks like I updated this a while ago maybe?) | 22:48 |
| cr1901 | https://github.com/SymbiFlow/symbiflow-arch-defs.git => https://github.com/SymbiFlow/f4pga-arch-defs | 22:50 |
| cr1901 | And I think that covers it | 22:50 |
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| cr1901 | (Oh, and master => main for symbiflow-arch-defs) | 22:52 |
| lkcl | cr1901, that's a really helpful list. it does look like redirects are in place which helps in the meantime | 22:53 |
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