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| web-50 | anyone up for some very elementary questions about FPGAs ? | 20:25 |
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| web-50 | I have written an integer RISC-V-64 CPU in verilog. It builds with Verilator and passes tests, so now I want to upload it to an FPGA. | 20:26 |
| web-50 | I have a Zybo Zynq 7000, but it was given to me by a friend and it seems in the FGPA world you have to buy a license just to talk to hardware you own, so I am very interested in the yosys and friends tools. | 20:27 |
| web-50 | The open source yosys etc. suite of tools looks very promising, especially as integrated by the APIO project: https://github.com/FPGAwars/apio , however it works only with certain FGPAs. | 20:28 |
| web-50 | I am not familiar with the various FPGAs that work with these open source tools, so I do not know which are powerful enough for my project. | 20:29 |
| web-50 | Can someone recommend an FPGA that these open source tools will work with, and yet is powerful enough to run an integer RISC-V-64 softcore CPU? | 20:30 |
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