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| agg | gatecat: on ecp5 alu, the output of one can be the carry input of the next, but the position difference depends on where each alu is placed (it's alternatively 4 or 5 columns); am i right in thinking the legacy constr_x can't deal with this and the new cluster stuff in principle could, but would need more supporting work on ecp5? | 22:25 |
|---|---|---|
| gatecat | agg: yes, that's correct, indeed this kind of thing was one of the use cases for the new API | 22:25 |
| agg | any idea if this would be tricky or relatively simple? | 22:26 |
| agg | i haven't looked at the cluster stuff in much detail yet, not sure if there's any examples to crib from for something like this | 22:26 |
| gatecat | no, the lack of examples to implement from would be the main problem here | 22:27 |
| gatecat | let me think about this over the weekend | 22:27 |
| agg | thanks, no rush or anything, was just curious after someone asked in #nmigen | 22:27 |
| agg | it turns out if you do set the bel locations for all the mults and alus, you can implement the 72x72 -> 144 wide multiply that diamond generates | 22:27 |
| agg | (well you need to delete a couple of unused cin inputs that it doesn't like, but otherwise pretty much just worked) | 22:28 |
| gatecat | oh nice | 22:28 |
| agg | i have been slowly working on fuzzing and adding timing info for the alus, since atm it's just there for mults, but at some point want to go through all the various diamond-generated dsp verilogs and get them working in npnr | 22:28 |
| agg | happy to have a go at adding alu-to-alu placement support some time though | 22:29 |
| gatecat | that'd be really nice, thanks for your work on this! | 22:29 |
| agg | no problem at all, thank you for all the rest of it! | 22:30 |
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