Tuesday, 2021-05-11

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thorns514apologies in advance for the vague question, but I'm working on my project and I noticed that if I try to reset an IO register in a reset block, it gets glitchy and fails above a certain frequency (see https://github.com/sthornington/matrix8x8/blob/main/src/matrix.sv#L299 ).  I can't think what is wrong with this hdl, and it works great using the lattice toolchain, but I am hesitant to make a bug report since I'm new to HDL and12:40
thorns514 synthesis12:40
thorns514is there something obviously wrong with resetting IO pins in reset blocks ?12:40
thorns514is there something obviously wrong with resetting IO registers in reset blocks ?12:40
gatecatno, it should work fine12:42
gatecatdo other small changes in the design cause a similar failure, or is it definitely down to this (small design changes can cause big changes in the output due to the chaotic behaviour of synthesis and PnR, enough to trigger marginal timing elsewhere, etc)12:43
mwkr_matrix_mosi has a different sync reset value and initial value btw, this means that hardware reset function will not be used12:44
mwkthis makes an extra multiplexer by necessity12:44
thorns514I narrowed it down to this, but I haven't tried changes elsewhere.  I had some issues with debounce.sv in the same directory until a month ago, it was complaining about combinational loops during aiger something or other, but an april build fixed that issue12:44
mwkit should still work though, as long as you meet timing12:44
thorns514I can try making them the same one moment12:44
gatecatthis will also be a known mismatch with the vendor tools, which will ignore the initial value (so r_matrix_mosi will init to 1 with them)12:45
thorns514changing the initial value to 1 fixed the issue!12:46
thorns514I haven't got it attached to the scope at the moment, but the display (which mosi drives) is not glitching any more and clk is at 100mhz12:46
mwkwhat does nextpnr say about timing btw?12:46
thorns514in both cases, timing was 112mhz pass at 100mhz12:47
mwkhmm....12:47
thorns514 mean, it changes 112 115 111 but in all cases passing you know12:47
mwkwait12:48
gatecatyeah, the ecp5 timing data is very conservative so that should be a clear pass12:48
mwkyou have a non-synthronized input wired to reset pin12:48
mwkof course it glitches12:48
thorns514gatecat> so if the initial value of reset is 1 and the initial value of mosi is 0 and in reset the value of mosi is set to 1, does that mean there's a double assignment initially or something?  I have had issues with double-assignments going unnoticed and cause strange synthesis before12:49
thorns514it's not non-synchronized. it's going through a double-FF debouncer?12:49
mwkit's not12:50
mwkreset is connected to db_btn_reset in top12:50
mwkassign db_btn_reset = db_btn_reset_raw || ~btn[0];12:51
mwkand this is obviously a combinatorial circuit with raw async button input12:51
mwkit *will* glitch12:51
thorns514oh I have played with that a variety of ways, it doesn't change anything12:51
thorns514and I'm not talking about a glitch when pressing reset12:51
thorns514I'm talking about it glitches from T0, never works at all12:52
thorns514getting rid of the || ~btn[0] doesn't change anything just checked12:53
thorns514but setting the initial value of mosi to 1 to be congruent with the reset value of mosi fixes it perfectly, so thank you for that12:53
mwkwell it still sounds like there is a glitch problem somewhere, except now it's hidden12:59
mwkthat or a nextpnr/yosys bug12:59
thorns514you could well be right, I will keep looking, but the difference between the initial mosi = 1 and initial mosi = 0 is stark; when congruent with the reset value, it works great, stable signals, reset works, wishbone master changing the image works.  when they are inconsistent, whatever is driving MOSI never really gets solid transitions going at all, it's just 100% oscillations and glitch from time zero.13:01
thorns514reset doesn't work, and the display is nonsense13:02
thorns514but that is not to say I don't have some lurking demon in the design, as I said, this is my first experience doing hardware so I'm learning as I go13:02
cr1901_modernWhy is btn[0] ORed with db_btn_reset_raw?13:04
thorns514I did that so it stays in reset as long as I hold the button down but I've removed that and it doesn't change anything13:08
thorns514but gatecat to your earlier question, giving r_serial_negedge an initial value also fixes the issue13:08
thorns514ugh hang on13:10
thorns514no it doesn't :(.13:11
thorns514in any case tonight after work I will try to investigate some of the intermediate outputs here to see what is different, changing an initial value from 0 -> 1 ought to be a small enough change that it ought not really change too too much but I suspect it is so that will be interesting13:12
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