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| promach3 | vup: I know, I mean yosys script that calls ISE bitstream generator | 01:18 |
|---|---|---|
| promach3 | now, I have the bitstream, how do I put the bitstream onto Spartan-6 without opening ISE software itself ? | 01:19 |
| vup | how is the fpga connected? | 01:19 |
| promach3 | JTAG | 01:20 |
| vup | is the JTAG adapter supported by openocd?, if yes maybe take a look at this: https://tomverbeure.github.io/2019/09/15/Loading-a-Spartan-6-bitstream-with-openocd.html ? | 01:20 |
| tpb | Title: Loading a Xilinx Spartan 6 bitstream with OpenOCD | Electronics etc… (at tomverbeure.github.io) | 01:20 |
| promach3 | vup: I am using FT2232H | 01:21 |
| vup | then that should probabl | 01:22 |
| vup | y work | 01:22 |
| promach3 | thanks for pointing out OpenOCD, let me try installing the software later | 01:22 |
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| promach3 | vup: I tried the webpage instruction, but I got the following error | 12:04 |
| * promach3 < https://matrix.org/_matrix/media/r0/download/matrix.org/XppOMhpPkaZdXlzcwCvOKTte/message.txt > | 12:05 | |
| vup | promach3: try a slower speed maybe? its not detecting any xilinx devices in the chain, maybe there are SI issues | 12:24 |
| promach3 | vup: now I have `Info : 111 5 core.c:1142 jtag_examine_chain_display(): JTAG tap: xc6s.tap tap/device found: 0x44002093 (mfg: 0x049 (Xilinx), part: 0x4002, ver: 0x4)` | 12:29 |
| promach3 | however, I still could not load the bitstream onto the FPGA using `sudo /usr/bin/openocd -d -f ./digilent-hs1.cfg -f /usr/share/openocd/scripts/cpld/xilinx-xc6s.cfg -c "transport select jtag" -c "adapter speed 1000 init; xc6s_program xc6s.tap; pld load 0 ./ddr3_memory_controller_par.bit ; exit"` Why ? | 12:30 |
| vup | well you did not give any error message or anything, so no clue? | 12:31 |
| * promach3 < https://matrix.org/_matrix/media/r0/download/matrix.org/qnBYuQRSmislwGmPUBDXbCxi/message.txt > | 12:31 | |
| promach3 | vup: here you go the log | 12:31 |
| vup | promach3: other than leaving out the duplicate `transport select jtag`, I see nothing wrong, are you sure it did not actually load the bitstream? | 12:34 |
| * promach3 uploaded an image: (17KiB) < https://matrix.org/_matrix/media/r0/download/matrix.org/ixKaMOnRuFHeTpNTVFtMoqlK/image.png > | 12:40 | |
| promach3 | vup: See https://github.com/promach/DDR/blob/main/test_ddr3_memory_controller.v#L81 and https://github.com/promach/DDR/blob/main/ddr3_memory_controller.ucf#L3 | 12:40 |
| promach3 | let me continue the debugging work later after I have my food | 12:41 |
| vup | promach3: I mean are you sure the ddr controller actually works? Maybe try a simple blinky on the other led first? | 12:44 |
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| promach3 | vup: just tested a LED, the openOCD does not put the bitstream yet | 13:17 |
| promach3 | D3 on R9 | 13:18 |
| promach3 | * D3 on `BANK2_IO_R9` | 13:19 |
| promach3 | what is the purpose of using `telnet` in this case ? | 13:20 |
| promach3 | besides, lowering the frequency speed to 100 still resulted in detection of AMD device instead of Xilinx device | 13:21 |
| vup | well without error messages, I don't really know what the problem could be, you could try xc3sprog... | 14:09 |
| * promach3 < https://matrix.org/_matrix/media/r0/download/matrix.org/PJywbbifhdvMsvnFJrXpfoim/message.txt > | 14:11 | |
| promach3 | vup: here you go the error log | 14:11 |
| promach3 | I suppose https://github.com/matrix-io/xc3sprog does not have FULL support for Spartan-6 ? | 14:13 |
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| vup | promach3: not sure what FULL support means, but it should be possible to program Spartan-6 with it | 15:16 |
| promach3 | vup: may I know the exact command-line syntax to program xc6slx16-3ftg256 ? | 15:39 |
| vup | promach3: man xc3sprog... | 15:42 |
| vup | but `xc3sprog -c ftdi` should show the fpga | 15:43 |
| vup | `xc3sprog -c ftdi bitstream.bit` should program it | 15:43 |
| * promach3 < https://matrix.org/_matrix/media/r0/download/matrix.org/sRdnceqIHfKUhMkTghGcjiSf/message.txt > | 16:03 | |
| promach3 | vup: I got some strange IDCODE issue from xc3sprog , probably spartan-6 is not yet fully supported ? | 16:04 |
| vup | promach3: I mean it says spartan-6 is supported: http://xc3sprog.sourceforge.net/hardware.php | 16:05 |
| tpb | Title: xc3sprog - Supported hardware (at xc3sprog.sourceforge.net) | 16:05 |
| vup | it seems to me that there are some connection / SI issues | 16:06 |
| promach3 | vup: solved the connection issue, but still could not load the bitstream onto Spartan-6 | 16:14 |
| * promach3 < https://matrix.org/_matrix/media/r0/download/matrix.org/YXskfkTjfREDVBJkMOQZsKXg/message.txt > | 16:14 | |
| vup | hmm a dna of 0xfeffffffffffffff seems pretty sketchy, maybe still connection issues? | 16:20 |
| promach3 | vup: after few more tries, `Device failed to configure, INSTRUCTION_CAPTURE is 0x11` disappears | 16:26 |
| promach3 | but the bitstream still won't load | 16:26 |
| promach3 | however, I still have `DNA is 0xfeffffffffffffff` | 16:26 |
| * promach3 < https://matrix.org/_matrix/media/r0/download/matrix.org/DMhHhIErmkWuhIupNQeXpxUh/message.txt > | 16:27 | |
| vup | well are you sure the bitstream is correct? can you check the DONE pin? | 16:28 |
| vup | also you can try the `-v` option to get more information | 16:29 |
| vup | but it seems like it actually writes the bitstream | 16:29 |
| * promach3 < https://matrix.org/_matrix/media/r0/download/matrix.org/PLkrDiuJZnafKHYIEbZcKoCh/message.txt > | 16:29 | |
| vup | yeah that sounds like it is programming the bitstream. What does the DONE pin say? (Is it low or high?) | 16:31 |
| promach3 | vup: see the updated code at https://github.com/promach/DDR/blob/main/test_ddr3_memory_controller.v#L75 and https://github.com/promach/DDR/blob/main/ddr3_memory_controller.ucf#L52 | 16:35 |
| * promach3 uploaded an image: (18KiB) < https://matrix.org/_matrix/media/r0/download/matrix.org/qDCjWrVDLRKmzwYEfzyyHHXD/image.png > | 16:35 | |
| promach3 | D3 is still not turned OFF after the bitstream is loaded | 16:35 |
| * promach3 posted a file: (121KiB) < https://matrix.org/_matrix/media/r0/download/matrix.org/vJiEHjSjmdLnqEzZGRpkGKZC/QM_HW_Design_V02.pdf > | 16:39 | |
| promach3 | this pdf is the FPGA board schematics | 16:39 |
| vup | and D2? | 16:41 |
| promach3 | vup: D2 is connected to `FPGA_DONE` signal | 16:42 |
| promach3 | that `FPGA_DONE` pin is not user pin though | 16:42 |
| promach3 | I could not allocate signal to use that pin though | 16:42 |
| vup | Yes but is D2 on or off? Or rather does it change after programming? | 16:53 |
| promach3 | vup: **D2 stays ON all the time** , be it before or after programming | 16:54 |
| promach3 | let me state it again : I do not have control over `FPGA_DONE` pin , hence D2 | 16:55 |
| promach3 | * let me state it again : I do not have direct control over `FPGA_DONE` pin , hence D2 | 16:55 |
| vup | Yes but FPGA_DONE is low when the fpga is not configured and high when it is | 17:03 |
| promach3 | vup: it seems that the manufacturer had burned a startup bitstream into the SPI flash | 17:11 |
| promach3 | but it seems that the newly loaded bitstream from xc3sprog did not overwrite the startup bitstream | 17:16 |
| promach3 | at least from my visual observation of the LED blinking activities | 17:16 |
| promach3 | let me check manufacturer documents again, I could not overwrite the startup bitstream | 17:17 |
| vup | promach3: yes, you are programming over jtag, the bitstream loaded from the SPI flash, if you want to overwrite that, you need to overwrite the SPI flash content | 17:18 |
| promach3 | vup: why need to overwrite SPI flash content ? I just want to load and run a bitstream | 17:21 |
| promach3 | there is no need to mess with SSPI flash for now | 17:21 |
| promach3 | * there is no need to mess with SPI flash for now | 17:21 |
| promach3 | * vup: why need to overwrite SPI flash content ? I just want to load and run a bitstream using JTAG | 17:21 |
| vup | sure, I thought you wanted to do that. Is there an example bitstream from the manufacturer? Try loading that with openocd or xc3sprog | 17:22 |
| promach3 | I have a feeling that the startup bitstream from the SPI flash takes higher priority that the JTAG | 17:23 |
| vup | it does not | 17:23 |
| vup | well | 17:23 |
| vup | depends on how you do it | 17:23 |
| vup | if program over JTAG and then power cycle of course the fpga load the bitstream from the SPI flash again | 17:23 |
| promach3 | vup: What is the purpose of `PROG_B` ? | 17:24 |
| vup | but if power up the board and then program the fpga over JTAG it will have the bitstream loaded you programmed over JTAG (until you powercycle) | 17:24 |
| promach3 | to be exact, `PROGRAM_B_2` | 17:24 |
| promach3 | because when I pull `PROGRAM_B_2` to ground, the D2 signal is low for few seconds | 17:25 |
| vup | promach3: ug380 | 17:25 |
| promach3 | which means `PROGRAM_B_2` plays a role in bitstream loading | 17:25 |
| vup | its a Active-lLow asynchronous full-chip reset | 17:25 |
| promach3 | ok | 17:26 |
| promach3 | vup: now, I am still stucked at getting bitstream programmed through JTAG | 17:28 |
| vup | well is there a bitstream provided by the manufacturer you could test xc3sprog with? | 17:29 |
| promach3 | <vup "well is there a bitstream provid"> yes | 17:30 |
| promach3 | let me try the manufacturer bitstream | 17:30 |
| promach3 | vup: I have two manufacturer bitstream, but both did not do anything, it seems | 17:35 |
| promach3 | I mean the JTAG-programmed bitstream do not perform the function | 17:36 |
| promach3 | vup: let me get back on debugging on this tomorrow. it is a bit late here | 17:37 |
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