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| whitequark | mwk: and autoidx | 09:35 |
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| lambda | mwk: have you started design/coding work on https://github.com/YosysHQ/yosys/issues/1959 yet? I'm wondering if it's worth looking into and getting a feel for it myself or if you're already invested with your own ideas | 18:31 |
| tpb | Title: Memory inference redesign · Issue #1959 · YosysHQ/yosys · GitHub (at github.com) | 18:31 |
| whitequark | whoo, someone ready to die on that specific hill! i will cheer you on | 18:32 |
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| whitequark | more than happy discuss the design as i've spent a while thinking about and discussing it | 18:33 |
| ZirconiumX | I've been thinking a lot about it too | 18:33 |
| whitequark | particularly around transparency and conversion to verilog | 18:33 |
| whitequark | other people might have been focusing on other areas | 18:33 |
| lambda | whitequark: I have a month of free time now, might as well try to do something useful ;) | 18:41 |
| whitequark | if you fix memory inference you'll have unending gratitude of a lot of people, me included | 18:42 |
| lambda | hehe, that alone sounds like a good enough reason to suffer through this alleged mess | 18:45 |
| whitequark | good luck. you're going to need it | 18:46 |
| whitequark | you'll understand it once you see the code | 18:46 |
| lambda | no promises | 18:46 |
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