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mwk | daveshah: any opposition to https://github.com/YosysHQ/yosys/pull/1673 from your side, or should I just merge it? | 11:11 |
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tpb | Title: Add opt_lut_ins pass. by mwkmwkmwk · Pull Request #1673 · YosysHQ/yosys · GitHub (at github.com) | 11:11 |
daveshah | mwk: I haven't actually had a chance to test it yet. Does it ensure that mux structures for ECP5 are always still complete? | 11:12 |
daveshah | nextpnr-ecp5 currently requires this | 11:13 |
mwk | no, it can turn a LUT into a const | 11:14 |
mwk | if it's not depending on *any* inputs | 11:14 |
daveshah | Ah, that will break then | 11:14 |
daveshah | I can look at fixing the nextpnr side but can't guarantee that will be today | 11:15 |
mwk | hmm | 11:16 |
daveshah | Although it doesn't actually break | 11:16 |
mwk | I can just disable this part for ecp5 and emit an all-0 or all-1 LUT4 instead | 11:17 |
daveshah | It seems to be doing that already? | 11:19 |
daveshah | e.g. | 11:19 |
daveshah | https://www.irccloud.com/pastebin/nxQzhSPS/ | 11:20 |
tpb | Title: Snippet | IRCCloud (at www.irccloud.com) | 11:20 |
mwk | oh | 11:20 |
mwk | it actually does that by an accident | 11:21 |
mwk | but yeah, it does work that way | 11:21 |
daveshah | Fine for me to be merged then | 11:21 |
mwk | (because the "pad to 4 if ecp5" code is before the "check if 0 inputs" code) | 11:21 |
mwk | I'll make this behavior more explicit | 11:23 |
daveshah | Thanks! | 11:23 |
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dkozel | Hi Folks. Just noticed that the sphinxcontrib-verilog-diagrams package is missing from pypi and cannot be installed (other than with git) via pip | 14:23 |
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