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| lukego | Is there any Emacs mode that vaguely suits rtlil? | 07:57 |
|---|---|---|
| ZirconiumX | Oh, hey lukego | 08:08 |
| lukego | G'day ZirconiumX :) | 08:08 |
| ZirconiumX | RTLIL is not really intended for human editing | 08:08 |
| lukego | I'm mostly intending to read at the moment. I think a little syntax colouring would help to make the \src attributes less distracting for example. | 08:09 |
| ZirconiumX | I mean, you can always write one :P | 08:10 |
| lukego | Sure just curious first what other people are doing e.g. maybe some generic commands can do the job too. Just now I'm using 'grep -v' but that's clunky :) | 08:12 |
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| lukego | Seems like the yosys package for nixpkgs doesn't pull in the runtime dependencies needed for 'yosys show'. I wonder if it should. | 08:14 |
| ZirconiumX | cc emily, maybe? | 08:16 |
| lukego | Good entry point for me into Yosys, checking for how it finds those commands. | 08:18 |
| lukego | via PATH by the look of it. So I guess the nix package would need a wrapper script. | 08:19 |
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| whitequark | daveshah: btw, have you ever considered porting some ecp5-only features of nextpnr back to ice40? | 16:44 |
| daveshah | I think it's only out-of-context that is ecp5 specific | 16:44 |
| daveshah | I will when I get round to it | 16:44 |
| daveshah | (and I wanted to deal with a few other related things first) | 16:45 |
| whitequark | oh alright, I somehow misremembered that there's more | 16:45 |
| whitequark | related: what about making HeAP the default on iCE40? | 16:45 |
| daveshah | Also on the TODO list (need to fix an edge case of a design with no regular IO, just oscillator and RGB primitives, causing a singular matrix) | 16:46 |
| whitequark | gotcha, thanks! | 16:46 |
| daveshah | I better get the iCE40 stuff into shape before the rumoured iCE28 or whatever is announced next month... | 16:47 |
| whitequark | the what | 16:58 |
| whitequark | i thought lattice gave up on that series | 16:58 |
| daveshah | Oh it is only the spiritual successor | 16:59 |
| daveshah | I don't think it will actually be called iCE28 | 16:59 |
| daveshah | But it will be a similar low power/feature set to the UltraPlus | 16:59 |
| ZirconiumX | I just hope their product naming scheme is better than their primitive naming scheme | 17:03 |
| daveshah | Primitive naming will doubtless be similar to ECP5 | 17:04 |
| whitequark | what about the CLBs? | 17:05 |
| daveshah | At a guess roughly ECP5-like, although I've heard some possible further experimentation has gone on | 17:06 |
| daveshah | The only thing they've officially said is still LUT4 based | 17:06 |
| whitequark | ah hm | 17:06 |
| whitequark | so they basically put the ice40 logic into trash? | 17:06 |
| daveshah | Yeah definitely | 17:07 |
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| daveshah | By the UltraPlus you could tell they were really hacking at the designs with no real understanding of them | 17:07 |
| daveshah | All the SiliconBlue people left soon after the merger, afaik | 17:07 |
| daveshah | Indeed Radiant tries to make the iCE40 logic look more like ECP5, presumably to fit the Lattice CAD architecture (e.g. rotating the chip through 90degrees) | 17:08 |
| ZirconiumX | So we're expecting this to be essentially a low-power ECP5-like? | 17:08 |
| daveshah | Yes | 17:08 |
| daveshah | I believe with iCE40UP-style large RAM blocks too (not sure if still single-ported) | 17:08 |
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| daveshah | see around p52 of http://ir.latticesemi.com/static-files/ae25405a-2497-471e-bee4-69b0c58b546e | 17:09 |
| ZirconiumX | That's...actually interesting to look at | 17:11 |
| ZirconiumX | "100% Focus on FPGA" | 17:11 |
| ZirconiumX | But isn't MachXO3 a CPLD? | 17:11 |
| daveshah | No, it's an FPGA | 17:11 |
| daveshah | Anything with LUTs is an FPGA, imo | 17:12 |
| ZirconiumX | Right, okay | 17:14 |
| whitequark | oh, so you would call LUT-based arches "FPGA" and SOP-based "CPLD"? that's one way to do it | 17:16 |
| whitequark | re SB people leaving: interesting. was their HDL/layout so impenetrable that the Lattice people couldn't figure it out? | 17:16 |
| whitequark | or is it just hard? | 17:17 |
| daveshah | My guess is that something like an FPGA is always going to be pretty nasty, because a lot is manually laid out rather than HDL | 17:30 |
| daveshah | It was also doubtless rushed given the constraints on SiliconBlue | 17:31 |
| daveshah | In fact I think SB would have gone bankrupt were it not for Lattice | 17:31 |
| daveshah | To get you an idea of the bodgniness - the DSPs are interconnected through a hacked logic tile | 17:32 |
| whitequark | I recall some of that I think | 17:32 |
| daveshah | Said logic tile still has all the logic intact - but the tools always setting the LUT as a route through from cascade in to out | 17:32 |
| daveshah | The DSP then taps of the LUT inputs and feeds its output into the logic tile cascade path | 17:33 |
| daveshah | Where the LUT then feeds it back to fabric | 17:33 |
| daveshah | If they knew what they were doing then they definitely wouldn't have left the redundant LUT in place adding delay but just kept the interconnect part of the tile | 17:34 |
| whitequark | wait what | 17:35 |
| whitequark | the ... LUTs are there | 17:35 |
| whitequark | lmao | 17:35 |
| daveshah | Yes | 17:35 |
| whitequark | what the fuck | 17:35 |
| whitequark | that's amazing | 17:35 |
| daveshah | I think the FFs might be there too but I've never tested | 17:35 |
| whitequark | this is webdev-level quality | 17:37 |
| daveshah | The lm4k goes a different approach and connects its hard IP via complete IO tiles | 17:38 |
| daveshah | Almost as if they laid two chips out next to each other and added some wires between the two | 17:38 |
| whitequark | um | 17:38 |
| mwk | they what | 17:39 |
| daveshah | If they weren't in wafer level packaging I'd be putting them in an xray | 17:39 |
| daveshah | But it must be one die, just laid out as two | 17:39 |
| whitequark | can someone send me some so i can take die shots | 17:39 |
| mwk | can... can you actually usefully program the LUT in any way? | 17:40 |
| whitequark | at least they didn't use the logic tile FF as DSP output register | 17:40 |
| daveshah | I think you could use the LUT just as a LUT if you were running low | 17:41 |
| daveshah | Just without the cascade function | 17:41 |
| whitequark | would be fun to make nextpnr do that | 17:41 |
| daveshah | Yeah, I might have a play with that | 17:41 |
| whitequark | hm, can't buy lm4k locally :/ | 17:43 |
| ZirconiumX | (could somebody expand lm4k for me?) | 17:44 |
| mwk | ZirconiumX: one of the ice40 parts | 17:44 |
| daveshah | lm1k and lm2k are the same dice btw | 17:44 |
| daveshah | as lm4k | 17:44 |
| whitequark | lp4k is a different device right | 17:45 |
| ZirconiumX | Ah, I see | 17:45 |
| daveshah | lp4k is rebranded lp8k | 17:45 |
| daveshah | One of the classic parts | 17:45 |
| whitequark | um | 17:45 |
| whitequark | ice5lp4k? | 17:45 |
| daveshah | Oh that's the iCE40 ultra | 17:45 |
| whitequark | NOT CONFUSING AT ALL | 17:46 |
| daveshah | idek where the 5 comes from | 17:46 |
| daveshah | I don't think it's 5nm | 17:46 |
| daveshah | And then they went back to 40 for ultralite and ultraplus | 17:46 |
| whitequark | ultralite is um. lm4k? | 17:46 |
| daveshah | No, ice40ul1k | 17:47 |
| whitequark | what the hell | 17:47 |
| whitequark | how many of these models do they -have- | 17:48 |
| daveshah | lm4k is a really weird somewhat abandoned series between the lp/hx and the various ultra parts | 17:48 |
| daveshah | It is not surprising its hard to get hold of | 17:48 |
| daveshah | The official dev board is also ridiculously expensive for some reason | 17:49 |
| whitequark | when did they rebrand UP as "low power AI" | 17:50 |
| daveshah | It's their whole new strategy | 17:50 |
| daveshah | "edge AI" | 17:50 |
| daveshah | They've got some model compiler tool now too, sensAI | 17:51 |
| whitequark | also what's up with having both diamond and radiant | 17:52 |
| daveshah | Radiant is an attempt at a fresh start | 17:52 |
| whitequark | ah, without neocad stuff | 17:52 |
| whitequark | but... it can only do UP? | 17:53 |
| daveshah | Oh no still neocad inside | 17:53 |
| daveshah | At least to some extent | 17:53 |
| whitequark | oh. | 17:53 |
| daveshah | Just a new GUI and some supposed pnr improvements | 17:53 |
| daveshah | Also some kind of IP integrator that doesn't quite work yet | 17:53 |
| daveshah | Radiant will be the CAD tool for new archs going forward | 17:53 |
| daveshah | The up5k is really just a proof of concept for it | 17:54 |
| whitequark | oic | 17:54 |
| ZirconiumX | Is Radiant a front-end to the old Diamond toolchain, or from-scratch? | 17:59 |
| daveshah | Half and half | 18:02 |
| daveshah | They've supposedly improved things a bit and changed the design database format | 18:03 |
| daveshah | But there's still plenty of NeoCAD in thete | 18:03 |
| daveshah | Unlike Vivado which was a near total from scratch job afaik | 18:03 |
| whitequark | "1000 person years" | 18:04 |
| dh73 | I know two folks that worked at Xilinx when they started to develop Vivado. They said that, a lot of departments got really crazy deadlines, and lots of engineering burnout | 18:09 |
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| daveshah | Oh another funny Radiant thing is that it is at least trying to replace some Tcl with Python (in particular the core generators) - but in true EDA style, Python 2.7 | 19:31 |
| daveshah | Yay for building using a dependency that will be obsolete by the time your tool is actually properly launched | 19:31 |
| whitequark | lol | 19:40 |
| whitequark | I'm actually not sure if I dislike Tcl that much | 19:41 |
| whitequark | in particular, it's very lightweight, unlike Python | 19:41 |
| whitequark | I would gladly use Tcl in nextpnr, because right now I assume I can't rely on any scripting capability at all | 19:41 |
| daveshah | Yeah, Python makes things for stuff like describing FPGAs or more complex prototyping | 19:43 |
| daveshah | It's a shame linking it is such a nuisance | 19:43 |
| whitequark | do you think there's any chance nextpnr could gain tcl bindings? | 19:45 |
| whitequark | I might volunteer to provide the implementation there | 19:45 |
| whitequark | after some in-depth Vivado work I grew to appreciate its Tcl capabilities | 19:45 |
| daveshah | I'd really rather not have to maintain two sets of bindings | 19:46 |
| daveshah | Another possibility is micropython | 19:46 |
| dnotq | Did you actually like Tcl though, or is the appreciation because it allowed you to do something you otherwise could not? | 19:46 |
| daveshah | Although it wouldn't work out of the box with Boost because it doesn't implement the CPython API | 19:47 |
| dnotq | Was Lua considered? It is designed to be embedded, is fast and lightweight. At work I have to maintain a code-base that binds Python and it is a PITA. | 19:48 |
| ZirconiumX | The Lua C API is mildly terrifying | 20:21 |
| ZirconiumX | setjmp/longjmp error handling | 20:24 |
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