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| ovf | nitpick: the documentation for the verilog backend shouldn't call it a frontend at https://github.com/YosysHQ/yosys/blob/8d9196066370b156ae2beefed5aa2da545255e4c/backends/verilog/verilog_backend.cc#L1796 , also reproduced at http://www.clifford.at/yosys/cmd_write_verilog.html | 11:14 |
|---|---|---|
| tpb | Title: yosys/verilog_backend.cc at 8d9196066370b156ae2beefed5aa2da545255e4c · YosysHQ/yosys · GitHub (at github.com) | 11:14 |
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| Kergadon | I would like to run a very short course on FPGA programing, I know that there were some introductory courses put together for using Yosys so I was wondering if there might be some slides that cover the basics of FPGA programing. | 15:01 |
| Kergadon | I am currently the only person at my makerspace familiar with the FPGA boards we recently acquired so I wanted to make sure to give the other members a chance to learn the basics before I have to leave to start a new job in another state. | 15:03 |
| tnt | there is the wtfpga workshop adapted to the icebreaker by esden | 15:03 |
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| Kergadon | Awesome thanks, tnt | 15:09 |
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| ZipCPU | Kergadon: I also offer slides in http://zipcpu.com/tutorial | 17:38 |
| tpb | Title: Verilog, Formal Verification and Verilator Beginner's Tutorial (at zipcpu.com) | 17:38 |
| Kergadon | Thanks that's a great help | 17:39 |
| * shapr hugs ZipCPU for awesome | 17:51 | |
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| maikmerten | turns out that ~250 iCE40 LCs can make music: https://drive.google.com/open?id=1Ogl_XgvafcEiYNZfUTCzjtCKMWBzlutq | 18:55 |
| tpb | Title: deflemask-animeopening.flac - Google Drive (at drive.google.com) | 18:55 |
| maikmerten | source: https://github.com/maikmerten/spu32/blob/master/audio/sn76489_wb8.v | 18:56 |
| tpb | Title: spu32/sn76489_wb8.v at master · maikmerten/spu32 · GitHub (at github.com) | 18:56 |
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| ZipCPU | maikmerten: That's awesome! Brings back some old memories too | 23:26 |
| * ZipCPU reminisces fondly of all the quarters he lost to Donky Kong | 23:26 | |
| * ZipCPU hugs shapr back | 23:27 | |
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